| Message ID | 20240109180930.90793-2-philmd@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | hw/arm: Prefer arm_feature() over object_property_find() | expand |
On 1/10/24 05:09, Philippe Mathieu-Daudé wrote: > cpu_isar_feature(aa64_mte, cpu) is testing a AArch64-only ID > register. The ARM_FEATURE_AARCH64 check is redundant. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > target/arm/cpu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index 1c8b787482..c828b333c9 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1690,8 +1690,7 @@ void arm_cpu_post_init(Object *obj) > } > > #ifndef CONFIG_USER_ONLY > - if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && > - cpu_isar_feature(aa64_mte, cpu)) { > + if (cpu_isar_feature(aa64_mte, cpu)) { > object_property_add_link(obj, "tag-memory", > TYPE_MEMORY_REGION, > (Object **)&cpu->tag_memory, It is not redundant. If !AARCH64, then the isar registers tested by aa64_mte are invalid. r~
On Wed, 10 Jan 2024 at 06:01, Richard Henderson <richard.henderson@linaro.org> wrote: > > On 1/10/24 05:09, Philippe Mathieu-Daudé wrote: > > cpu_isar_feature(aa64_mte, cpu) is testing a AArch64-only ID > > register. The ARM_FEATURE_AARCH64 check is redundant. > > > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > > --- > > target/arm/cpu.c | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > > index 1c8b787482..c828b333c9 100644 > > --- a/target/arm/cpu.c > > +++ b/target/arm/cpu.c > > @@ -1690,8 +1690,7 @@ void arm_cpu_post_init(Object *obj) > > } > > > > #ifndef CONFIG_USER_ONLY > > - if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && > > - cpu_isar_feature(aa64_mte, cpu)) { > > + if (cpu_isar_feature(aa64_mte, cpu)) { > > object_property_add_link(obj, "tag-memory", > > TYPE_MEMORY_REGION, > > (Object **)&cpu->tag_memory, > > It is not redundant. > > If !AARCH64, then the isar registers tested by aa64_mte are invalid. Ah, I think I steered Philippe wrongly on IRC on this one because I forgot how our feature checking handled this, but yes, you're right. -- PMM
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 1c8b787482..c828b333c9 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1690,8 +1690,7 @@ void arm_cpu_post_init(Object *obj) } #ifndef CONFIG_USER_ONLY - if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && - cpu_isar_feature(aa64_mte, cpu)) { + if (cpu_isar_feature(aa64_mte, cpu)) { object_property_add_link(obj, "tag-memory", TYPE_MEMORY_REGION, (Object **)&cpu->tag_memory,
cpu_isar_feature(aa64_mte, cpu) is testing a AArch64-only ID register. The ARM_FEATURE_AARCH64 check is redundant. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/arm/cpu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)