From patchwork Tue Jan 23 06:38:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765181 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1460707wrx; Mon, 22 Jan 2024 22:40:25 -0800 (PST) X-Google-Smtp-Source: AGHT+IFXz8eNHkgg+1rpy9S09ks8DZ84NXL4Gsne2dwztlozur4+tvOia3HhtcO3V4Z0i3fQ8i2a X-Received: by 2002:a05:620a:846:b0:783:352b:d8b5 with SMTP id u6-20020a05620a084600b00783352bd8b5mr5940252qku.51.1705992025669; Mon, 22 Jan 2024 22:40:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1705992025; cv=none; d=google.com; s=arc-20160816; b=F5wX9SE5azkXM46ElVKbbRvrdw8wiB2JCTt/DdhRScr8wjYQd5w3LxpO0jMySWu/WW A1+7eALzn08hZ+REJ8ytFmhU1bsoknsYik5//nzaPYUtjwIHSa7it+xSCme04Q6m/T27 8EG/o3JrmReGJDzUjl9T4sHzwBva5/Rtml8qTE11dLGyntHw37DkFp2Cm8Mlj+fQOaTn AW/JoStJ+dyIUspWH/fQ6VjumxRuxJoU+4yvHJNp2R0PXDZvY8AKBtSi0rWRZmQLzPaT KL36ivNJECf5PbRljh/2N1ayEceGNSRSEqFrTdoU2H8W2RKKStBYWm9X9R9nbLIx27t8 hewA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ce+1xoISDEqzphDfXb+KFJwfSUtAI/2aaWKElbLspcc=; fh=HVoLZTw5hlqqes9L9DSbvdhxOE62q72aEHLq82QYnRw=; b=lFHamOvjCbMxdFX5uzjLy6Hd7SOlFzsDp0IP/8Ua2sIUemxjKw7KkYb4WMUTlkOmxg bVT7ageanb8U+t1/aTMgW/0XifVEHFt/QJ7YQnv7dCmWg0oFOPlsj1uThPGtjSlnW7UE oZNrnVqK9MNbv2lC7X35pmds5oOlzS5uMdi2S9S1ZlPNV84i0L8c8jhvL4hPWhiiwBDa 55R/8vpOqnEsqRa0At02yOnm1mkh4MakIiUi0LSudeH47ylKBJMbKBWZDdsgnx2Ig5PY o+BxV1Mw1IxqV5LpNv5ddW9jMyPOE+qGW/PTg8fmQowtJ8dQzraaaFckeRey8ig/pU3Q We/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JHXiUwNs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h17-20020ac85e11000000b0042a089bb3b6si7441186qtx.40.2024.01.22.22.40.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 22 Jan 2024 22:40:25 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JHXiUwNs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rSARM-0003lJ-Bx; Tue, 23 Jan 2024 01:39:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rSARK-0003iL-Ne for qemu-devel@nongnu.org; Tue, 23 Jan 2024 01:39:18 -0500 Received: from mail-lj1-x230.google.com ([2a00:1450:4864:20::230]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rSARI-00085s-U8 for qemu-devel@nongnu.org; Tue, 23 Jan 2024 01:39:18 -0500 Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-2cdebb968feso45380861fa.1 for ; Mon, 22 Jan 2024 22:39:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705991955; x=1706596755; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ce+1xoISDEqzphDfXb+KFJwfSUtAI/2aaWKElbLspcc=; b=JHXiUwNszo6n9td+0KFwL4FbdF8xQC40nZfab4bz9rChyLWeEOSspcI+NDfqHLHkhX KtHTqmL4UleGsuCPiLJlPTo1odSI2MlyyLWPj6P8L17C0RLzhJXVRgNWb1EqfwGKtRQx G/4gng6nBkYlzH1UVNkyvXZwk32VS0xtz96Ly/uqF71ABnvO8A3kNOGCdmfm5tyVy1na YDaXh3nDf3VTeZM40sRTXgBQE3RjfqleSlRPCiE4BwFzE3VfHDsXZrbJS/CteRT13nH+ rn9FjwRU+jthwkMLi64QEL1kjdiGQwAS8XbPfceGuzGTTzexE83JmJQ+TLoYqzM1gzSU WTyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705991955; x=1706596755; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ce+1xoISDEqzphDfXb+KFJwfSUtAI/2aaWKElbLspcc=; b=q4j+U+9nm88lcj3KY3h64nT2a/zPiIqhuTao4ZKB8/bmHzYPlUnUq4OtI+GfbW2s4E L6dl6nje+u8st/MpLLdnKPMq7V6tAMHwgRJw77coDU9mSpetCnwxCLcrMU801t/V+tYZ rH8tdt0DltJ3u1HDe8Afy1bwPxOFcFrSSCyU1Bceorni+CHSgx31pvlmbsoyOFBmCjhE JqYdEM/K3tYFdrMBO3jA61YWW8xRb1NSAVXpMIX1lWX7LvM2Zk6Y5//+tlC0Q+VSHHGz F78cQXLJDZ1e00US+AaVQ5QwkxYoj73wnEjeW8PBTG+sQUowYnPnFzHkKDR7HQ3nuX90 lhKQ== X-Gm-Message-State: AOJu0YxoNfxVkF8QSK5MovOfJY3AJ0LZ5gOrWzUmFz8R/UVvX/I1XVER DfADC7Lf4pWPUGtCgkgNMxTqu43EpOJco6boEzgbWpvvVSNBmbAZdUeTl5I3lhdKCh8dTCOvajs eAiA= X-Received: by 2002:ac2:46e7:0:b0:50e:885d:4d1d with SMTP id q7-20020ac246e7000000b0050e885d4d1dmr1893073lfo.37.1705991954947; Mon, 22 Jan 2024 22:39:14 -0800 (PST) Received: from m1x-phil.lan ([176.187.194.78]) by smtp.gmail.com with ESMTPSA id vx4-20020a170907a78400b00a2d62a515e8sm11264326ejc.212.2024.01.22.22.39.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 22 Jan 2024 22:39:14 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , Igor Mammedov , Alistair Francis , Gavin Shan , Andrew Jeffery , =?utf-8?q?C=C3=A9dric_Le_Goat?= =?utf-8?q?er?= , qemu-arm@nongnu.org, Igor Mitsyanko , Joel Stanley , "Edgar E. Iglesias" , Rob Herring , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 5/8] hw/arm/aspeed/2500: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:39 +0100 Message-ID: <20240123063842.35255-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::230; envelope-from=philmd@linaro.org; helo=mail-lj1-x230.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/arm/aspeed.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index e0e0877b1d..df627096d2 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -1152,6 +1152,11 @@ static const char * const ast2400_a1_valid_cpu_types[] = { NULL }; +static const char * const ast2500_a1_valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("arm1176"), + NULL +}; + static void aspeed_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -1236,6 +1241,7 @@ static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc, amc->num_cs = 1; amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init = palmetto_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1253,6 +1259,7 @@ static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx25l25635f"; amc->num_cs = 1; amc->i2c_init = ast2500_evb_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1271,6 +1278,7 @@ static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx25l25635e"; amc->num_cs = 2; amc->i2c_init = yosemitev2_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1288,6 +1296,7 @@ static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx66l1g45g"; amc->num_cs = 2; amc->i2c_init = romulus_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1306,6 +1315,7 @@ static void aspeed_machine_tiogapass_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx25l25635e"; amc->num_cs = 2; amc->i2c_init = tiogapass_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1324,6 +1334,7 @@ static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx66l1g45g"; amc->num_cs = 2; amc->i2c_init = sonorapass_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1341,6 +1352,7 @@ static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx66l1g45g"; amc->num_cs = 2; amc->i2c_init = witherspoon_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1398,6 +1410,7 @@ static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data) amc->num_cs = 2; amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init = g220a_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 1024 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1416,6 +1429,7 @@ static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, void *data) amc->num_cs = 2; amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init = fp5280g2_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name);