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Fri, 15 Mar 2024 06:09:53 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Cc: qemu-riscv@nongnu.org, Anton Johansson , qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Daniel_P_=2E_Berrang?= =?utf-8?q?=C3=A9?= , Paolo Bonzini , Eduardo Habkost , Claudio Fontana , Richard Henderson , Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , Manos Pitsidianakis , Zhao Liu , qemu-arm@nongnu.org, Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Laurent Vivier Subject: [PATCH-for-9.1 06/21] target/i386: Make X86_CPU common to new I386_CPU / X86_64_CPU types Date: Fri, 15 Mar 2024 14:08:54 +0100 Message-ID: <20240315130910.15750-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240315130910.15750-1-philmd@linaro.org> References: <20240315130910.15750-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "target/foo/cpu-qom.h" can not use any target specific definitions. Currently "target/i386/cpu-qom.h" defines TYPE_X86_CPU depending on the i386/x86_64 build type. This doesn't scale in a heterogeneous context where we need to access both types concurrently. In order to do that, introduce the new I386_CPU / X86_64_CPU types, both inheriting a common TYPE_X86_CPU base type. Keep the current "base" and "max" CPU types as 32 or 64-bit, depending on the binary built. Adapt the cpu-plug-test, since the 'base' architecture is now common to both 32/64-bit x86 targets. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson --- target/i386/cpu-qom.h | 16 ++++++++++------ target/i386/cpu.c | 20 ++++++++++++++++++-- tests/qtest/cpu-plug-test.c | 2 +- 3 files changed, 29 insertions(+), 9 deletions(-) diff --git a/target/i386/cpu-qom.h b/target/i386/cpu-qom.h index d4e216d000..de28d7ea20 100644 --- a/target/i386/cpu-qom.h +++ b/target/i386/cpu-qom.h @@ -1,5 +1,5 @@ /* - * QEMU x86 CPU + * QEMU x86 CPU QOM header (target agnostic) * * Copyright (c) 2012 SUSE LINUX Products GmbH * @@ -22,14 +22,18 @@ #include "hw/core/cpu.h" -#ifdef TARGET_X86_64 -#define TYPE_X86_CPU "x86_64-cpu" -#else -#define TYPE_X86_CPU "i386-cpu" -#endif +#define TYPE_X86_CPU "x86-cpu" +#define TYPE_I386_CPU "i386-cpu" +#define TYPE_X86_64_CPU "x86_64-cpu" OBJECT_DECLARE_CPU_TYPE(X86CPU, X86CPUClass, X86_CPU) +OBJECT_DECLARE_CPU_TYPE(I386CPU, X86CPUClass, I386_CPU) +OBJECT_DECLARE_CPU_TYPE(X86_64CPU, X86CPUClass, X86_64_CPU) + +#define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU +#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX) + #define X86_CPU_TYPE_SUFFIX "-" TYPE_X86_CPU #define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ebf555f50f..07f64c1ea5 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8057,12 +8057,28 @@ static const TypeInfo x86_cpu_types[] = { .class_size = sizeof(X86CPUClass), .class_init = x86_cpu_common_class_init, }, { - .name = X86_CPU_TYPE_NAME("base"), + .name = TYPE_I386_CPU, .parent = TYPE_X86_CPU, + .abstract = true, + }, { + .name = TYPE_X86_64_CPU, + .parent = TYPE_X86_CPU, + .abstract = true, + }, { + .name = X86_CPU_TYPE_NAME("base"), +#ifdef TARGET_X86_64 + .parent = TYPE_X86_64_CPU, +#else + .parent = TYPE_I386_CPU, +#endif .class_init = x86_cpu_base_class_init, }, { .name = X86_CPU_TYPE_NAME("max"), - .parent = TYPE_X86_CPU, +#ifdef TARGET_X86_64 + .parent = TYPE_X86_64_CPU, +#else + .parent = TYPE_I386_CPU, +#endif .instance_init = max_x86_cpu_initfn, .class_init = max_x86_cpu_class_init, } diff --git a/tests/qtest/cpu-plug-test.c b/tests/qtest/cpu-plug-test.c index 7f5dd5f85a..97316d131f 100644 --- a/tests/qtest/cpu-plug-test.c +++ b/tests/qtest/cpu-plug-test.c @@ -90,7 +90,7 @@ static void add_pc_test_case(const char *mname) data->machine = g_strdup(mname); data->cpu_model = "Haswell"; /* 1.3+ theoretically */ data->device_model = g_strdup_printf("%s-%s-cpu", data->cpu_model, - qtest_get_arch()); + qtest_get_base_arch()); data->sockets = 1; data->cores = 3; data->threads = 2;