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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id z26-20020aa785da000000b006e64ddfa71asm7654894pfn.170.2024.04.08.22.03.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 22:03:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 27/28] target/i386: Pass host pointer and size to cpu_x86_{fxsave, fxrstor} Date: Mon, 8 Apr 2024 19:03:01 -1000 Message-Id: <20240409050302.1523277-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240409050302.1523277-1-richard.henderson@linaro.org> References: <20240409050302.1523277-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We have already validated the memory region in the course of validating the signal frame. No need to do it again within the helper function. Signed-off-by: Richard Henderson --- target/i386/cpu.h | 4 ++-- linux-user/i386/signal.c | 13 +++++-------- target/i386/tcg/fpu_helper.c | 26 ++++++++++++++++---------- 3 files changed, 23 insertions(+), 20 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 8eb97fdd7a..35a8bf831f 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2234,8 +2234,8 @@ int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector, void cpu_x86_load_seg(CPUX86State *s, X86Seg seg_reg, int selector); void cpu_x86_fsave(CPUX86State *s, void *host, size_t len); void cpu_x86_frstor(CPUX86State *s, void *host, size_t len); -void cpu_x86_fxsave(CPUX86State *s, target_ulong ptr); -void cpu_x86_fxrstor(CPUX86State *s, target_ulong ptr); +void cpu_x86_fxsave(CPUX86State *s, void *host, size_t len); +void cpu_x86_fxrstor(CPUX86State *s, void *host, size_t len); void cpu_x86_xsave(CPUX86State *s, target_ulong ptr, uint64_t rbfm); void cpu_x86_xrstor(CPUX86State *s, target_ulong ptr, uint64_t rbfm); diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index 7178440d67..b823dee17f 100644 --- a/linux-user/i386/signal.c +++ b/linux-user/i386/signal.c @@ -293,14 +293,11 @@ static abi_ptr get_sigframe(struct target_sigaction *ka, CPUX86State *env, * Set up a signal frame. */ -static void fxsave_sigcontext(CPUX86State *env, X86LegacyXSaveArea *fxstate, - abi_ptr fxstate_addr) +static void fxsave_sigcontext(CPUX86State *env, X86LegacyXSaveArea *fxstate) { struct target_fpx_sw_bytes *sw = (void *)&fxstate->sw_reserved; - /* fxstate_addr must be 16 byte aligned for fxsave */ - assert(!(fxstate_addr & 0xf)); - cpu_x86_fxsave(env, fxstate_addr); + cpu_x86_fxsave(env, fxstate, sizeof(*fxstate)); __put_user(0, &sw->magic1); } @@ -411,7 +408,7 @@ static void setup_sigcontext(CPUX86State *env, xsave_sigcontext(env, fxstate, fpstate_addr, fxstate_addr, fpend_addr); break; case FPSTATE_FXSAVE: - fxsave_sigcontext(env, fxstate, fxstate_addr); + fxsave_sigcontext(env, fxstate); break; default: break; @@ -668,7 +665,7 @@ static bool xrstor_sigcontext(CPUX86State *env, FPStateKind fpkind, break; } - cpu_x86_fxrstor(env, fxstate_addr); + cpu_x86_fxrstor(env, fxstate, sizeof(*fxstate)); return true; } @@ -686,7 +683,7 @@ static bool frstor_sigcontext(CPUX86State *env, FPStateKind fpkind, } break; case FPSTATE_FXSAVE: - cpu_x86_fxrstor(env, fxstate_addr); + cpu_x86_fxrstor(env, fxstate, sizeof(*fxstate)); break; case FPSTATE_FSAVE: break; diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 0a91757690..1c2121c559 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -3040,22 +3040,28 @@ void cpu_x86_frstor(CPUX86State *env, void *host, size_t len) do_frstor(&ac, 0, true); } -void cpu_x86_fxsave(CPUX86State *env, target_ulong ptr) +void cpu_x86_fxsave(CPUX86State *env, void *host, size_t len) { - X86Access ac; + X86Access ac = { + .haddr1 = host, + .size = sizeof(X86LegacyXSaveArea), + .env = env, + }; - access_prepare(&ac, env, ptr, sizeof(X86LegacyXSaveArea), - MMU_DATA_STORE, 0); - do_fxsave(&ac, ptr); + assert(ac.size <= len); + do_fxsave(&ac, 0); } -void cpu_x86_fxrstor(CPUX86State *env, target_ulong ptr) +void cpu_x86_fxrstor(CPUX86State *env, void *host, size_t len) { - X86Access ac; + X86Access ac = { + .haddr1 = host, + .size = sizeof(X86LegacyXSaveArea), + .env = env, + }; - access_prepare(&ac, env, ptr, sizeof(X86LegacyXSaveArea), - MMU_DATA_LOAD, 0); - do_fxrstor(&ac, ptr); + assert(ac.size <= len); + do_fxrstor(&ac, 0); } void cpu_x86_xsave(CPUX86State *env, target_ulong ptr, uint64_t rfbm)