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[176.184.44.142]) by smtp.gmail.com with ESMTPSA id p8-20020a05600c358800b00418f72d9027sm40703434wmq.18.2024.04.29.14.31.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 29 Apr 2024 14:31:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 08/13] accel/tcg: Move @iommu_notifiers from CPUState to TCG AccelCPUState Date: Mon, 29 Apr 2024 23:30:45 +0200 Message-ID: <20240429213050.55177-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240429213050.55177-1-philmd@linaro.org> References: <20240429213050.55177-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=philmd@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org @iommu_notifiers is specific to TCG system emulation, move it to AccelCPUState. Restrict TCG specific code in system/physmem.c, adding an empty stub for tcg_register_iommu_notifier(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240428221450.26460-20-philmd@linaro.org> --- accel/tcg/vcpu-state.h | 3 +++ include/hw/core/cpu.h | 3 --- system/physmem.c | 37 ++++++++++++++++++++++++++++--------- 3 files changed, 31 insertions(+), 12 deletions(-) diff --git a/accel/tcg/vcpu-state.h b/accel/tcg/vcpu-state.h index 5b09279140..51e54ca535 100644 --- a/accel/tcg/vcpu-state.h +++ b/accel/tcg/vcpu-state.h @@ -19,6 +19,9 @@ struct AccelCPUState { #ifdef CONFIG_USER_ONLY TaskState *ts; +#else + /* track IOMMUs whose translations we've cached in the TCG TLB */ + GArray *iommu_notifiers; #endif /* !CONFIG_USER_ONLY */ #ifdef CONFIG_PLUGIN diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 97a0baf874..f3cbb944eb 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -539,9 +539,6 @@ struct CPUState { /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */ bool prctl_unalign_sigbus; - /* track IOMMUs whose translations we've cached in the TCG TLB */ - GArray *iommu_notifiers; - /* * MUST BE LAST in order to minimize the displacement to CPUArchState. */ diff --git a/system/physmem.c b/system/physmem.c index 44e477a1a5..1e003e42bb 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -27,6 +27,8 @@ #include "qemu/madvise.h" #ifdef CONFIG_TCG +#include "exec/translate-all.h" +#include "accel/tcg/vcpu-state.h" #include "hw/core/tcg-cpu-ops.h" #endif /* CONFIG_TCG */ @@ -578,6 +580,8 @@ MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, return mr; } +#ifdef CONFIG_TCG + typedef struct TCGIOMMUNotifier { IOMMUNotifier n; MemoryRegion *mr; @@ -614,17 +618,20 @@ static void tcg_register_iommu_notifier(CPUState *cpu, TCGIOMMUNotifier *notifier = NULL; int i; - for (i = 0; i < cpu->iommu_notifiers->len; i++) { - notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i); + for (i = 0; i < cpu->accel->iommu_notifiers->len; i++) { + notifier = g_array_index(cpu->accel->iommu_notifiers, + TCGIOMMUNotifier *, i); if (notifier->mr == mr && notifier->iommu_idx == iommu_idx) { break; } } - if (i == cpu->iommu_notifiers->len) { + if (i == cpu->accel->iommu_notifiers->len) { /* Not found, add a new entry at the end of the array */ - cpu->iommu_notifiers = g_array_set_size(cpu->iommu_notifiers, i + 1); + cpu->accel->iommu_notifiers = g_array_set_size(cpu->accel->iommu_notifiers, + i + 1); notifier = g_new0(TCGIOMMUNotifier, 1); - g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i) = notifier; + g_array_index(cpu->accel->iommu_notifiers, + TCGIOMMUNotifier *, i) = notifier; notifier->mr = mr; notifier->iommu_idx = iommu_idx; @@ -656,19 +663,31 @@ void tcg_iommu_free_notifier_list(CPUState *cpu) int i; TCGIOMMUNotifier *notifier; - for (i = 0; i < cpu->iommu_notifiers->len; i++) { - notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i); + for (i = 0; i < cpu->accel->iommu_notifiers->len; i++) { + notifier = g_array_index(cpu->accel->iommu_notifiers, + TCGIOMMUNotifier *, i); memory_region_unregister_iommu_notifier(notifier->mr, ¬ifier->n); g_free(notifier); } - g_array_free(cpu->iommu_notifiers, true); + g_array_free(cpu->accel->iommu_notifiers, true); } void tcg_iommu_init_notifier_list(CPUState *cpu) { - cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier *)); + cpu->accel->iommu_notifiers = g_array_new(false, true, + sizeof(TCGIOMMUNotifier *)); } +#else + +static void tcg_register_iommu_notifier(CPUState *cpu, + IOMMUMemoryRegion *iommu_mr, + int iommu_idx) +{ +} + +#endif + /* Called from RCU critical section */ MemoryRegionSection * address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr orig_addr,