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([149.14.240.163]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41f88111033sm272134645e9.34.2024.05.15.07.59.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 May 2024 07:59:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH 3/5] tcg/aarch64: Support TCG_TARGET_HAS_tst_vec Date: Wed, 15 May 2024 16:58:58 +0200 Message-Id: <20240515145900.252870-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240515145900.252870-1-richard.henderson@linaro.org> References: <20240515145900.252870-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=richard.henderson@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 2 +- tcg/aarch64/tcg-target.c.inc | 26 ++++++++++++++++++++++++-- 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 138bafb9da..8bd9e6a5eb 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -167,7 +167,7 @@ typedef enum { #define TCG_TARGET_HAS_minmax_vec 1 #define TCG_TARGET_HAS_bitsel_vec 1 #define TCG_TARGET_HAS_cmpsel_vec 0 -#define TCG_TARGET_HAS_tst_vec 0 +#define TCG_TARGET_HAS_tst_vec 1 #define TCG_TARGET_DEFAULT_MO (0) #define TCG_TARGET_NEED_LDST_LABELS diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 56fc9cb9e0..ffa8a3e519 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -2737,7 +2737,8 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, TCGCond cond = args[3]; AArch64Insn insn; - if (cond == TCG_COND_NE) { + switch (cond) { + case TCG_COND_NE: if (const_args[2]) { if (is_scalar) { tcg_out_insn(s, 3611, CMTST, vece, a0, a1, a1); @@ -2752,7 +2753,27 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, } tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a0); } - } else { + break; + + case TCG_COND_TSTNE: + case TCG_COND_TSTEQ: + if (const_args[2]) { + /* (x & 0) == 0 */ + tcg_out_dupi_vec(s, type, MO_8, a0, + -(cond == TCG_COND_TSTEQ)); + break; + } + if (is_scalar) { + tcg_out_insn(s, 3611, CMTST, vece, a0, a1, a2); + } else { + tcg_out_insn(s, 3616, CMTST, is_q, vece, a0, a1, a2); + } + if (cond == TCG_COND_TSTEQ) { + tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a0); + } + break; + + default: if (const_args[2]) { if (is_scalar) { insn = cmp0_scalar_insn[cond]; @@ -2791,6 +2812,7 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, } tcg_out_insn_3616(s, insn, is_q, vece, a0, a1, a2); } + break; } } break;