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<20240702092051.45754-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Cédric Le Goater Signed-off-by: Cédric Le Goater Signed-off-by: Cédric Le Goater Co-Developed-by: Philippe Mathieu-Daudé Tested-by: Cédric Le Goater Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240628070216.92609-18-philmd@linaro.org> --- hw/sd/sdmmc-internal.h | 108 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) diff --git a/hw/sd/sdmmc-internal.h b/hw/sd/sdmmc-internal.h index d8bf17d204..936c75cace 100644 --- a/hw/sd/sdmmc-internal.h +++ b/hw/sd/sdmmc-internal.h @@ -11,6 +11,114 @@ #ifndef SDMMC_INTERNAL_H #define SDMMC_INTERNAL_H +/* + * EXT_CSD Modes segment + * + * Define the configuration the Device is working in. + * These modes can be changed by the host by means of the SWITCH command. + */ +#define EXT_CSD_CMDQ_MODE_EN 15 /* R/W */ +#define EXT_CSD_FLUSH_CACHE 32 /* W */ +#define EXT_CSD_CACHE_CTRL 33 /* R/W */ +#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */ +#define EXT_CSD_PACKED_FAILURE_INDEX 35 /* RO */ +#define EXT_CSD_PACKED_CMD_STATUS 36 /* RO */ +#define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */ +#define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */ +#define EXT_CSD_CLASS_6_CTRL 59 +#define EXT_CSD_INI_TIMEOUT_EMU 60 +#define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */ +#define EXT_CSD_USE_NATIVE_SECTOR 62 +#define EXT_CSD_NATIVE_SECTOR_SIZE 63 +#define EXT_CSD_VENDOR_SPECIFIC_FIELD 64 /* 64 bytes */ +#define EXT_CSD_PROGRAM_CID_CSD_DDR_SUPPORT 130 +#define EXT_CSD_PERIODIC_WAKEUP 131 +#define EXT_CSD_TCASE_SUPPORT 132 +#define EXT_CSD_SEC_BAD_BLK_MGMNT 134 +#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ +#define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */ +#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */ +#define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* RO, 3 bytes */ +#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */ +#define EXT_CSD_HPI_MGMT 161 /* R/W */ +#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */ +#define EXT_CSD_BKOPS_EN 163 /* R/W */ +#define EXT_CSD_BKOPS_START 164 /* W */ +#define EXT_CSD_SANITIZE_START 165 /* W */ +#define EXT_CSD_WR_REL_PARAM 166 /* RO */ +#define EXT_CSD_WR_REL_SET 167 +#define EXT_CSD_RPMB_MULT 168 /* RO */ +#define EXT_CSD_FW_CONFIG 169 /* R/W */ +#define EXT_CSD_USER_WP 171 +#define EXT_CSD_BOOT_WP 173 /* R/W */ +#define EXT_CSD_BOOT_WP_STATUS 174 +#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ +#define EXT_CSD_BOOT_BUS_CONDITIONS 177 +#define EXT_CSD_BOOT_CONFIG_PROT 178 +#define EXT_CSD_PART_CONFIG 179 /* R/W */ +#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ +#define EXT_CSD_BUS_WIDTH 183 /* R/W */ +#define EXT_CSD_STROBE_SUPPORT 184 /* RO */ +#define EXT_CSD_HS_TIMING 185 /* R/W */ +#define EXT_CSD_POWER_CLASS 187 /* R/W */ +#define EXT_CSD_CMD_SET_REV 189 +#define EXT_CSD_CMD_SET 191 +/* + * EXT_CSD Properties segment + * + * Define the Device capabilities, cannot be modified by the host. + */ +#define EXT_CSD_REV 192 +#define EXT_CSD_STRUCTURE 194 +#define EXT_CSD_CARD_TYPE 196 +#define EXT_CSD_DRIVER_STRENGTH 197 +#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 +#define EXT_CSD_PART_SWITCH_TIME 199 +#define EXT_CSD_PWR_CL_52_195 200 +#define EXT_CSD_PWR_CL_26_195 201 +#define EXT_CSD_PWR_CL_52_360 202 +#define EXT_CSD_PWR_CL_26_360 203 +#define EXT_CSD_SEC_CNT 212 /* 4 bytes */ +#define EXT_CSD_S_A_TIMEOUT 217 +#define EXT_CSD_S_C_VCCQ 219 +#define EXT_CSD_S_C_VCC 220 +#define EXT_CSD_REL_WR_SEC_C 222 +#define EXT_CSD_HC_WP_GRP_SIZE 221 +#define EXT_CSD_ERASE_TIMEOUT_MULT 223 +#define EXT_CSD_HC_ERASE_GRP_SIZE 224 +#define EXT_CSD_ACC_SIZE 225 +#define EXT_CSD_BOOT_MULT 226 +#define EXT_CSD_BOOT_INFO 228 +#define EXT_CSD_SEC_FEATURE_SUPPORT 231 +#define EXT_CSD_TRIM_MULT 232 +#define EXT_CSD_INI_TIMEOUT_PA 241 +#define EXT_CSD_BKOPS_STATUS 246 +#define EXT_CSD_POWER_OFF_LONG_TIME 247 +#define EXT_CSD_GENERIC_CMD6_TIME 248 +#define EXT_CSD_CACHE_SIZE 249 /* 4 bytes */ +#define EXT_CSD_EXT_SUPPORT 494 +#define EXT_CSD_LARGE_UNIT_SIZE_M1 495 +#define EXT_CSD_CONTEXT_CAPABILITIES 496 +#define EXT_CSD_TAG_RES_SIZE 497 +#define EXT_CSD_TAG_UNIT_SIZE 498 +#define EXT_CSD_DATA_TAG_SUPPORT 499 +#define EXT_CSD_MAX_PACKED_WRITES 500 +#define EXT_CSD_MAX_PACKED_READS 501 +#define EXT_CSD_BKOPS_SUPPORT 502 +#define EXT_CSD_HPI_FEATURES 503 +#define EXT_CSD_S_CMD_SET 504 + +#define EXT_CSD_WR_REL_PARAM_EN (1 << 2) +#define EXT_CSD_WR_REL_PARAM_EN_RPMB_REL_WR (1 << 4) + +#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7) +#define EXT_CSD_PART_CONFIG_ACC_DEFAULT (0x0) +#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1) + +#define EXT_CSD_PART_CONFIG_EN_MASK (0x7 << 3) +#define EXT_CSD_PART_CONFIG_EN_BOOT0 (0x1 << 3) +#define EXT_CSD_PART_CONFIG_EN_USER (0x7 << 3) + #define SDMMC_CMD_MAX 64 /**