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[209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-460428decd6si22422521cf.742.2024.10.10.14.52.17 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 10 Oct 2024 14:52:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EBemordH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sz13y-0007pI-2n; Thu, 10 Oct 2024 17:51:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sz13v-0007gq-Hw for qemu-devel@nongnu.org; Thu, 10 Oct 2024 17:51:11 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sz13t-0004gF-TJ for qemu-devel@nongnu.org; Thu, 10 Oct 2024 17:51:11 -0400 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-20b7eb9e81eso14393485ad.2 for ; Thu, 10 Oct 2024 14:51:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728597068; x=1729201868; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+Ui/XvxKnnZVh9IYJxTskSnnCd0iokhNHwaYVOmaueo=; b=EBemordH6Voi1K4v1KM4H5xEYSXoKSomt9OpAh2Y9L/tRFfEPqxg4refdIqofHht6N 69cerGNkmcgyZe174+eKHtV7o3CyNx8oZSFUrkOuBL6xcGkeuk49CpIKqzuucm9tSsQQ Z5SurrGKkGQnpwOPgfwUO5MjAAZK6Bh8M/x/h5LaEoFv8+g0fw7nj8ey747hf5JwJCLF JCPPpQ46jRIzPpkZWxIheECauqyhvoZvNB4BKd8Ce490FGR7rC5jN2QAw4gpFqwxi+iT ahQGkvR3H7bVAUs2Ehezlc1NtOuI7UB238uXIDIVy1DE0aVpoEcfLZKR1JVJ3/wEpppd Grjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728597068; x=1729201868; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+Ui/XvxKnnZVh9IYJxTskSnnCd0iokhNHwaYVOmaueo=; b=u2Tx3ZnawbjCk/qpJc5u7RKyaoUlIaAbnyu6Qy/A6SYxqAuR9beX6F/+4nX+b5vWEo 9oCHO7fn4aT/LxEAwk6HgHmjmgLzOpZVZXut+WRrvmZN2YF6MMQZLLNGK8DKPPFsA3bc X7q0a5gIdDxzW3Fdy2btIUllhvcQeYWGRwzefXiJPumHKT+NhwBtV6mN5j39kq/Mr+K9 h7e3RCBCDiq+56B4qJ9kqX3115GSX0ZuWpuNxvq6cx+i8TcBpULVr7uCnwO0o4qeijYy ZhU2hkqg2mygUG+8GXTyRehvK2lyg1R/MvIgUy24CtdEVaFHsoClm3j40lMzfFc5d5yj 7F6Q== X-Gm-Message-State: AOJu0YxP+zBhVdoo+oAQQ3k+p6X3d9aHnhUoKN/HOLRib1MktIVbkuVX CkuGdqb7Qg+Unwz/Ko2ugIbbQ2/vO0pr44Ds14V5vo3RJ4PUflE0Zupj/rXvWNGhAbX914KKXa5 f X-Received: by 2002:a17:902:d50e:b0:20c:8907:90a with SMTP id d9443c01a7336-20ca13f732amr4235685ad.5.1728597068001; Thu, 10 Oct 2024 14:51:08 -0700 (PDT) Received: from localhost.localdomain ([45.176.89.169]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20c8c0f5b90sm13633745ad.128.2024.10.10.14.51.05 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 10 Oct 2024 14:51:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Jiaxun Yang , =?utf-8?q?Herv=C3=A9_Poussineau?= , Aleksandar Rikalo , Aurelien Jarno , Richard Henderson Subject: [PATCH v2 06/16] target/mips: Factor mo_endian_rev() out of MXU code Date: Thu, 10 Oct 2024 18:50:04 -0300 Message-ID: <20241010215015.44326-7-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241010215015.44326-1-philmd@linaro.org> References: <20241010215015.44326-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Instead of swapping the reversed target endianness using MO_BSWAP, directly return the correct endianness. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/tcg/translate.h | 5 +++++ target/mips/tcg/mxu_translate.c | 8 ++++---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index e81a8d5eb9b..c55f90e741b 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -240,4 +240,9 @@ static inline bool disas_is_bigendian(DisasContext *ctx) return extract32(ctx->CP0_Config0, CP0C0_BE, 1); } +static inline MemOp mo_endian_rev(DisasContext *dc, bool reversed) +{ + return disas_is_bigendian(dc) ^ reversed ? MO_BE : MO_LE; +} + #endif diff --git a/target/mips/tcg/mxu_translate.c b/target/mips/tcg/mxu_translate.c index c517258ac5a..dd512ce7a48 100644 --- a/target/mips/tcg/mxu_translate.c +++ b/target/mips/tcg/mxu_translate.c @@ -1533,7 +1533,7 @@ static void gen_mxu_s32ldxx(DisasContext *ctx, bool reversed, bool postinc) tcg_gen_add_tl(t0, t0, t1); tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, - (MO_TESL ^ (reversed ? MO_BSWAP : 0)) | + MO_SL | mo_endian_rev(ctx, reversed) | ctx->default_tcg_memop_mask); gen_store_mxu_gpr(t1, XRa); @@ -1569,7 +1569,7 @@ static void gen_mxu_s32stxx(DisasContext *ctx, bool reversed, bool postinc) gen_load_mxu_gpr(t1, XRa); tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, - (MO_TESL ^ (reversed ? MO_BSWAP : 0)) | + MO_SL | mo_endian_rev(ctx, reversed) | ctx->default_tcg_memop_mask); if (postinc) { @@ -1605,7 +1605,7 @@ static void gen_mxu_s32ldxvx(DisasContext *ctx, bool reversed, tcg_gen_add_tl(t0, t0, t1); tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, - (MO_TESL ^ (reversed ? MO_BSWAP : 0)) | + MO_SL | mo_endian_rev(ctx, reversed) | ctx->default_tcg_memop_mask); gen_store_mxu_gpr(t1, XRa); @@ -1675,7 +1675,7 @@ static void gen_mxu_s32stxvx(DisasContext *ctx, bool reversed, gen_load_mxu_gpr(t1, XRa); tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, - (MO_TESL ^ (reversed ? MO_BSWAP : 0)) | + MO_SL | mo_endian_rev(ctx, reversed) | ctx->default_tcg_memop_mask); if (postinc) {