From patchwork Thu Jan 24 17:28:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Catalin Marinas X-Patchwork-Id: 156502 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp2224164jaa; Thu, 24 Jan 2019 09:28:54 -0800 (PST) X-Google-Smtp-Source: ALg8bN7Nql6oY1naoIjyQfYcAsQde8CgZERg0sAP/AIC+XFhvDjZLlw4+4CMlpiEzNz9eMApB+jW X-Received: by 2002:a62:7c47:: with SMTP id x68mr7411845pfc.209.1548350934284; Thu, 24 Jan 2019 09:28:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548350934; cv=none; d=google.com; s=arc-20160816; b=PPfN8L6XCzXsCDosbjvDJZjPN7UgYrU7/KhUq67sICcRJ/JUQ6UJ07YEtLEs0cWzNe 4GhCbAdd9DGIc+yR6HD1HvD87iozYzUZafIy+MqCdCtKbm8yayHdLic95dQ25RPSqCcI JJ4Epl4OQmMjJuZIwm8/TtFNXgTDrvt9xXaD8aS+OKLwdSlnahnY3ihYbqs7UjPI1d4m Z+673oWQibrm/0SvowqljnCNKtHJFpbLIZ9CIHKh/MHHrWGLV6c1v4jzDvKGdkms/laN IcaAvVSPvuCa9fbyjYUbdDENCb2iI6RD0qAixb7A2oXk9OQK4Tp0lB4A+78ejQa3fDO2 ZPHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=yHfxLPojpcdx9gkEqg5KrmKDZTX0a0jCXA0g08ZP74U=; b=e8oJAgNts2nrV6teuVlOGeWdFtuSwWAbBGRyoObk7fLhOcZvMMLs7MMXTad7FiiRwI ++QfOHXUltWHmG/48K90uC7o+3SDiSEHQNHqnommHGP2NWBFpr/xTVX7lz8+S5sIkmlS iuncpUqZBUtzwgQXpXlzRaXbocLUOqmyJzesfvyRx3DGtWzFLnAr74ABR+uO690nSwY1 bZ1Tz6VcHJk2jgt8YTqdKqDFL9R0IdAc+EKvnc4dJhllVmJOUr0R23TpF5ej5LTRSFPY 7hUw7+IESiShBlGdu6RZiwC27DX16BfGMzncjXz5LG8STWcxrLtsV6gC5PDEs2mzPmEI EeOQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e66si8677597plb.107.2019.01.24.09.28.53; Thu, 24 Jan 2019 09:28:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727765AbfAXR2w (ORCPT + 15 others); Thu, 24 Jan 2019 12:28:52 -0500 Received: from foss.arm.com ([217.140.101.70]:33090 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729057AbfAXR2n (ORCPT ); Thu, 24 Jan 2019 12:28:43 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3071FA78; Thu, 24 Jan 2019 09:28:43 -0800 (PST) Received: from arrakis.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F09D83F5AF; Thu, 24 Jan 2019 09:28:41 -0800 (PST) From: Catalin Marinas To: linux-arm-kernel@lists.infradead.org, Will Deacon Cc: Shijith Thotton , Wandun Chen , stable@vger.kernel.org Subject: [PATCH] arm64: Do not issue IPIs for user executable ptes Date: Thu, 24 Jan 2019 17:28:37 +0000 Message-Id: <20190124172837.10011-1-catalin.marinas@arm.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org Commit 3b8c9f1cdfc5 ("arm64: IPI each CPU after invalidating the I-cache for kernel mappings") was aimed at fixing the I-cache invalidation for kernel mappings. However, it inadvertently caused all cache maintenance for user mappings via set_pte_at() -> __sync_icache_dcache() -> sync_icache_aliases() to call kick_all_cpus_sync(). Reported-by: Shijith Thotton Tested-by: Shijith Thotton Reported-by: Wandun Chen Fixes: 3b8c9f1cdfc5 ("arm64: IPI each CPU after invalidating the I-cache for kernel mappings") Cc: # 4.19.x- Signed-off-by: Catalin Marinas --- Hi Will, You acked the previous inlined patch but I think that's a better option to revert the kernel behaviour w.r.t. user mapping to that prior to commit 3b8c9f1cdfc5. If you plan a pull request for 5.0-rc4, please pick this up as well. Thanks. arch/arm64/mm/flush.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c index 30695a868107..5c9073bace83 100644 --- a/arch/arm64/mm/flush.c +++ b/arch/arm64/mm/flush.c @@ -33,7 +33,11 @@ void sync_icache_aliases(void *kaddr, unsigned long len) __clean_dcache_area_pou(kaddr, len); __flush_icache_all(); } else { - flush_icache_range(addr, addr + len); + /* + * Don't issue kick_all_cpus_sync() after I-cache invalidation + * for user mappings. + */ + __flush_icache_range(addr, addr + len); } }