From patchwork Fri Jan 24 09:30:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 233174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 144C2C2D0DB for ; Fri, 24 Jan 2020 09:58:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CE43F218AC for ; Fri, 24 Jan 2020 09:58:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579859896; bh=9KSIgLDHVRjgSoKPtmIG72EjgQ0WND4hEZJpGFPXWF4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=CkifTFqZzMR1kupMf5h28bzFC374z+TDtFHQLaxFfAdSLSgBL0oWkoNxYWI1YVrP8 Wb71tWwlJ0qpo9XRXOeyU7BRNQXywNP8cAS8ONtxygHCFd5KidRMoYoigkCUsTeweM htnQ7myQFZSdQs2xsRzooYy8qrUgebAG05J5MDR4= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729719AbgAXJ6Q (ORCPT ); Fri, 24 Jan 2020 04:58:16 -0500 Received: from mail.kernel.org ([198.145.29.99]:33764 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725821AbgAXJ6P (ORCPT ); Fri, 24 Jan 2020 04:58:15 -0500 Received: from localhost (unknown [145.15.244.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 175B320709; Fri, 24 Jan 2020 09:58:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579859895; bh=9KSIgLDHVRjgSoKPtmIG72EjgQ0WND4hEZJpGFPXWF4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=i2vmN3MhgfGILzW5/3HNlIl6OFRjuE/Uns0gagcDpSx9CBtenLClrVgAESP4PzahK yQSuw2KoJlT0tWvj5b7DN9CKHsR7VIckoVvTlDBzG/uWJb4i90cTQL7TU98IzO/lGD K372qzSJYEKXbN34ojbStPJ6bXHTzB9Vek1cayLc= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Martin Blumenstingl , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Neil Armstrong , Thierry Reding , Sasha Levin Subject: [PATCH 4.14 204/343] pwm: meson: Consider 128 a valid pre-divider Date: Fri, 24 Jan 2020 10:30:22 +0100 Message-Id: <20200124092946.863136485@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200124092919.490687572@linuxfoundation.org> References: <20200124092919.490687572@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Martin Blumenstingl [ Upstream commit 51496e4446875726d50a5617a6e0e0dabbc2e6da ] The pre-divider allows configuring longer PWM periods compared to using the input clock directly. The pre-divider is 7 bit wide, meaning it's maximum value is 128 (the register value is off-by-one: 0x7f or 127). Change the loop to also allow for the maximum possible value to be considered valid. Fixes: 211ed630753d2f ("pwm: Add support for Meson PWM Controller") Signed-off-by: Martin Blumenstingl Acked-by: Uwe Kleine-König Reviewed-by: Neil Armstrong Signed-off-by: Thierry Reding Signed-off-by: Sasha Levin --- drivers/pwm/pwm-meson.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 9b79cbc7a7152..9551f896dd6f3 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -188,7 +188,7 @@ static int meson_pwm_calc(struct meson_pwm *meson, do_div(fin_ps, fin_freq); /* Calc pre_div with the period */ - for (pre_div = 0; pre_div < MISC_CLK_DIV_MASK; pre_div++) { + for (pre_div = 0; pre_div <= MISC_CLK_DIV_MASK; pre_div++) { cnt = DIV_ROUND_CLOSEST_ULL((u64)period * 1000, fin_ps * (pre_div + 1)); dev_dbg(meson->chip.dev, "fin_ps=%llu pre_div=%u cnt=%u\n", @@ -197,7 +197,7 @@ static int meson_pwm_calc(struct meson_pwm *meson, break; } - if (pre_div == MISC_CLK_DIV_MASK) { + if (pre_div > MISC_CLK_DIV_MASK) { dev_err(meson->chip.dev, "unable to get period pre_div\n"); return -EINVAL; }