From patchwork Tue Oct 27 13:53:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 312186 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF551C64E7C for ; Tue, 27 Oct 2020 16:56:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 70B6720727 for ; Tue, 27 Oct 2020 16:56:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603817815; bh=r0xZ+MyCwCIzzwRBd9HQIigHLDj6HOeCaat5FOkT96w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=AqObr46RSbGph8buZqvPsoUQfysC1QsyWANq5O/KRYQMiuVHPWiXEXNUHAyY7qbhp MSMz3vPGEVyIWTDr7sDJJNwDBX9rjW6ItJPYnU0mPh32ekPOIrpNrHN026ZeqbteH1 GnC6RhJrO2TdlL7Tzcfudk7BqBuGTYpuAmY2YDRo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1814529AbgJ0Q4w (ORCPT ); Tue, 27 Oct 2020 12:56:52 -0400 Received: from mail.kernel.org ([198.145.29.99]:45678 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1790464AbgJ0PKD (ORCPT ); Tue, 27 Oct 2020 11:10:03 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3552821D24; Tue, 27 Oct 2020 15:10:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603811402; bh=r0xZ+MyCwCIzzwRBd9HQIigHLDj6HOeCaat5FOkT96w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=A1SqBtxwQOE96obPiKE+pT6DwNmHYuB3wbNMqyzptEcWMkluNfCee5694qdz9r6TV 97VDAkFXJOr7nf8tz58N74TpvHACUu7StDO/VmWiEAI2Dzma8bC7Sd1XTbnqiqGWGZ ZvHM4ncATxZ2wojKqlHK6uowccPI44KKbDrw/nEY= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Claudiu Beznea , Alexandre Belloni , Stephen Boyd , Sasha Levin Subject: [PATCH 5.8 450/633] clk: at91: clk-main: update key before writing AT91_CKGR_MOR Date: Tue, 27 Oct 2020 14:53:13 +0100 Message-Id: <20201027135543.823316244@linuxfoundation.org> X-Mailer: git-send-email 2.29.1 In-Reply-To: <20201027135522.655719020@linuxfoundation.org> References: <20201027135522.655719020@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Claudiu Beznea [ Upstream commit 85d071e7f19a6a9abf30476b90b3819642568756 ] SAMA5D2 datasheet specifies on chapter 33.22.8 (PMC Clock Generator Main Oscillator Register) that writing any value other than 0x37 on KEY field aborts the write operation. Use the key when selecting main clock parent. Fixes: 27cb1c2083373 ("clk: at91: rework main clk implementation") Signed-off-by: Claudiu Beznea Reviewed-by: Alexandre Belloni Link: https://lore.kernel.org/r/1598338751-20607-3-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin --- drivers/clk/at91/clk-main.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index 37c22667e8319..4313ecb2af5b2 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c @@ -437,12 +437,17 @@ static int clk_sam9x5_main_set_parent(struct clk_hw *hw, u8 index) return -EINVAL; regmap_read(regmap, AT91_CKGR_MOR, &tmp); - tmp &= ~MOR_KEY_MASK; if (index && !(tmp & AT91_PMC_MOSCSEL)) - regmap_write(regmap, AT91_CKGR_MOR, tmp | AT91_PMC_MOSCSEL); + tmp = AT91_PMC_MOSCSEL; else if (!index && (tmp & AT91_PMC_MOSCSEL)) - regmap_write(regmap, AT91_CKGR_MOR, tmp & ~AT91_PMC_MOSCSEL); + tmp = 0; + else + return 0; + + regmap_update_bits(regmap, AT91_CKGR_MOR, + AT91_PMC_MOSCSEL | MOR_KEY_MASK, + tmp | AT91_PMC_KEY); while (!clk_sam9x5_main_ready(regmap)) cpu_relax();