From patchwork Tue Oct 27 13:54:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 312698 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A48D1C55178 for ; Tue, 27 Oct 2020 15:10:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 50D6221D24 for ; Tue, 27 Oct 2020 15:10:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603811454; bh=zR/4SYxqV0XpBDux8pkqtxQwrUvbY+G0bPc6m5JCbJ0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=wRo7Vd3S3BbJNT/P6nfkbCtA/MDWhsug6AiaW9wwMmpEHZCdviqAj46TISl6pM7xH OdoaNJKl64IpKNoNKyP7/aJbX5IshFf8A09kp1iYSjTzxU/aBpuVapiTV+CGGzpjkP xGFb0lZyifplOiL3XNZSmVVZfVnBVr8F4x5IFoLU= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1794263AbgJ0PKv (ORCPT ); Tue, 27 Oct 2020 11:10:51 -0400 Received: from mail.kernel.org ([198.145.29.99]:46514 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1794254AbgJ0PKt (ORCPT ); Tue, 27 Oct 2020 11:10:49 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 447FF20657; Tue, 27 Oct 2020 15:10:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603811448; bh=zR/4SYxqV0XpBDux8pkqtxQwrUvbY+G0bPc6m5JCbJ0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JZQAxMonoerOqZQAdWkMfsu4IrS+5SfHfPQDEfOW+tQOG18bLKzu10J/cOWv6QTlR +3ZR7eRg04/KRPXjNP6w66CIeqQgolhm4rfKLmKFZ2vlRi+krxID29t56Yx5yJ+XdJ jDkT4qpMVirjyYE+Gejyw8FGnTmv7KGOFXXgjlUo= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Stephan Gerhold , Bjorn Andersson , Sasha Levin Subject: [PATCH 5.8 497/633] arm64: dts: qcom: msm8916: Fix MDP/DSI interrupts Date: Tue, 27 Oct 2020 14:54:00 +0100 Message-Id: <20201027135546.044210354@linuxfoundation.org> X-Mailer: git-send-email 2.29.1 In-Reply-To: <20201027135522.655719020@linuxfoundation.org> References: <20201027135522.655719020@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Stephan Gerhold [ Upstream commit 027cca9eb5b450c3f6bb916ba999144c2ec23cb7 ] The mdss node sets #interrupt-cells = <1>, so its interrupts should be referenced using a single cell (in this case: only the interrupt number). However, right now the mdp/dsi node both have two interrupt cells set, e.g. interrupts = <4 0>. The 0 is probably meant to say IRQ_TYPE_NONE (= 0), but with #interrupt-cells = <1> this is actually interpreted as a second interrupt line. Remove the IRQ flags from both interrupts to fix this. Fixes: 305410ffd1b2 ("arm64: dts: msm8916: Add display support") Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20200915071221.72895-5-stephan@gerhold.net Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 729d36ff2e247..103d2226c579b 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1021,7 +1021,7 @@ mdp: mdp@1a01000 { reg-names = "mdp_phys"; interrupt-parent = <&mdss>; - interrupts = <0 0>; + interrupts = <0>; clocks = <&gcc GCC_MDSS_AHB_CLK>, <&gcc GCC_MDSS_AXI_CLK>, @@ -1053,7 +1053,7 @@ dsi0: dsi@1a98000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 0>; + interrupts = <4>; assigned-clocks = <&gcc BYTE0_CLK_SRC>, <&gcc PCLK0_CLK_SRC>;