From patchwork Mon Apr 12 08:40:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 419509 Delivered-To: patch@linaro.org Received: by 2002:a02:c4d2:0:0:0:0:0 with SMTP id h18csp1556764jaj; Mon, 12 Apr 2021 01:51:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz0fCsCzULZVyZPv0/PdZG72qbC2J3N/SAD8EQJtpeqISESaDPdufxgaQ8K5F4NHpldeBkW X-Received: by 2002:a17:90b:16cd:: with SMTP id iy13mr28775498pjb.46.1618217465806; Mon, 12 Apr 2021 01:51:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618217465; cv=none; d=google.com; s=arc-20160816; b=GK36GNbBfKV5Vp5qsuENhoKDMsTWINWeqJz/ZU6/spQ/3EQubjG5X22gvSP7dlvKVC 9yzTzASn0X7JQDAhzuEhrrqsyULKl7ZNnQMO+XrdludCOBnjRQMg5if7hsrEJObBBuYZ lkkpTXVMzl7r7LQLhCK65mB9cRV6/rzBCkgsyB1skhBAdQ1Aco/vxNF4n5TRaSpekzFa mMyxAY5xH6nyy+gIe7azr/dVKpxj3/HPHjpJl9OztzkE1c7svTSSISmOab6kZg0T0jl6 dNs3yU6yZ9VkSvVj6ToZqZX2p21opN/3G6x3BMdJcrbE6RF/2SfbBNHuRbkwtKj+fyEk CKkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=xyT61G05+LDLBPkVCwFst6AHZ1I4ATpGkvDBwb1ROgg=; b=kRrKz0MqTah63xyctUIr1iKKUlDGhXfGlmmjRS3TBCmv1bcW+piwPKF8bSG6JY3IlP HDiF3Bti9NLBlXN/sD/ofvjp4UCdnJwhoeR2ZK5jCEWPaZofkmg2i/fEUEIzp+PMGs3w MLpapsswJU9N6o0jv/qPLDXrdg6Aw/knu8DriGma5A/zMyic0RBMbAm9GpdhCV/7kTm7 nPi22PzPGm9giyfwiGQnqb9K8wqkN6gkaK4HiVLsoV4E2DfGIVixGhdGF2bDGFvnczNz WHXyjyDNATv9+hpbZMJPPn5E/VQideZWRca6GKzqmRYVr9vEU6y3OhlDGygpgu759ly3 3HQw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=tYqRbk1Z; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j6si12779253pgq.283.2021.04.12.01.51.05; Mon, 12 Apr 2021 01:51:05 -0700 (PDT) Received-SPF: pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=tYqRbk1Z; spf=pass (google.com: domain of stable-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237832AbhDLIvQ (ORCPT + 12 others); Mon, 12 Apr 2021 04:51:16 -0400 Received: from mail.kernel.org ([198.145.29.99]:38250 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238030AbhDLItE (ORCPT ); Mon, 12 Apr 2021 04:49:04 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id D460D61286; Mon, 12 Apr 2021 08:47:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1618217280; bh=9g/bVRJ1aoldgEKD3LoXYipmQ7cfIU+mi+YDdBADxgk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tYqRbk1ZymRhOqa2deqYyxgONKlCb9vu+7sg7ilMFzdHJD2ApTvSXAoUXryb4MySX 9PMJog+rrfSZA+nxI/gIG2w0Pv7RR75Bz5WWqr0QYLwx2UWp/YKOYtLPLUT/Vco0uY BxMRXkAjaMty5/G8aAj3yoapfYlM8cSCh8rEPWzA= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Shengjiu Wang , Charles Keepax , Mark Brown , Sasha Levin Subject: [PATCH 5.4 051/111] ASoC: wm8960: Fix wrong bclk and lrclk with pll enabled for some chips Date: Mon, 12 Apr 2021 10:40:29 +0200 Message-Id: <20210412084005.963420648@linuxfoundation.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210412084004.200986670@linuxfoundation.org> References: <20210412084004.200986670@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Shengjiu Wang [ Upstream commit 16b82e75c15a7dbd564ea3654f3feb61df9e1e6f ] The input MCLK is 12.288MHz, the desired output sysclk is 11.2896MHz and sample rate is 44100Hz, with the configuration pllprescale=2, postscale=sysclkdiv=1, some chip may have wrong bclk and lrclk output with pll enabled in master mode, but with the configuration pllprescale=1, postscale=2, the output clock is correct. >From Datasheet, the PLL performs best when f2 is between 90MHz and 100MHz when the desired sysclk output is 11.2896MHz or 12.288MHz, so sysclkdiv = 2 (f2/8) is the best choice. So search available sysclk_divs from 2 to 1 other than from 1 to 2. Fixes: 84fdc00d519f ("ASoC: codec: wm9860: Refactor PLL out freq search") Signed-off-by: Shengjiu Wang Acked-by: Charles Keepax Link: https://lore.kernel.org/r/1616150926-22892-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- sound/soc/codecs/wm8960.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.30.2 diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 6cf0f6612bda..708fc4ed54ed 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -707,7 +707,13 @@ int wm8960_configure_pll(struct snd_soc_component *component, int freq_in, best_freq_out = -EINVAL; *sysclk_idx = *dac_idx = *bclk_idx = -1; - for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { + /* + * From Datasheet, the PLL performs best when f2 is between + * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz + * or 12.288MHz, then sysclkdiv = 2 is the best choice. + * So search sysclk_divs from 2 to 1 other than from 1 to 2. + */ + for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) { if (sysclk_divs[i] == -1) continue; for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {