From patchwork Mon Mar 16 19:40:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Warren X-Patchwork-Id: 243710 List-Id: U-Boot discussion From: twarren at nvidia.com (twarren at nvidia.com) Date: Mon, 16 Mar 2020 12:40:44 -0700 Subject: [PATCH 0/5] Misc fixes for Tegra Message-ID: <1584387649-20959-1-git-send-email-twarren@nvidia.com> From: Tom Warren These fixes originated on our downstream L4T U-Boot, and include fdt, pinmux, pll and code relocation changes. JC Kuo (1): t210: do not enable PLLE and UPHY PLL HW PWRSEQ Stephen Warren (1): ARM: tegra: rework fdt_serial_tag_setup_one Tom Warren (2): fdt: Fix 'system' command ARM: Tegra: Use calculated env var feature on all T186/T210 boards Vishruth (1): ARM: tegra: p2771-0000: enable PIE relocation arch/arm/cpu/armv8/cpu.c | 5 ++ arch/arm/include/asm/arch-tegra/xusb-padctl.h | 1 + arch/arm/mach-tegra/board2.c | 6 +++ arch/arm/mach-tegra/ft_board_info.c | 77 +++++++++++++++++++++++++++ arch/arm/mach-tegra/ft_board_info.h | 23 ++++++++ arch/arm/mach-tegra/tegra210/clock.c | 19 ------- arch/arm/mach-tegra/tegra210/xusb-padctl.c | 68 ++++++++++++++--------- arch/arm/mach-tegra/xusb-padctl-dummy.c | 4 ++ cmd/fdt.c | 2 +- configs/p2771-0000-000_defconfig | 1 + configs/p2771-0000-500_defconfig | 1 + include/configs/p2771-0000.h | 23 +------- include/configs/tegra186-common.h | 22 +++++++- include/configs/tegra210-common.h | 23 ++++++-- 14 files changed, 204 insertions(+), 71 deletions(-) create mode 100644 arch/arm/mach-tegra/ft_board_info.c create mode 100644 arch/arm/mach-tegra/ft_board_info.h