From patchwork Fri May 22 10:44:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 246240 List-Id: U-Boot discussion From: michal.simek at xilinx.com (Michal Simek) Date: Fri, 22 May 2020 12:44:04 +0200 Subject: [PATCH 0/7] mmc: zynqmp_sdhci: Add support for Tap delay Message-ID: Hi, this patchset adding support for Tap delay programming for ZynqMP and Versal. Based on mainline discussion also DT properties have been introduced which are documented here. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/Documentation/devicetree/bindings/mmc/mmc-controller.yaml?h=v5.7-rc6&id=fec81c5bca2499b4a263667860018c2ce47f4f51 The patchset is using these DT properties which are optional. Default values are also listed. The patchset is based on: https://lists.denx.de/pipermail/u-boot/2020-May/410326.html Also new code is adding checking for SOCs which are not needed at that time when patch is applied (For example "mmc: zynq_sdhci: Read clock phase delays from dt" and IS_ENABLED(CONFIG_ARCH_ZYNQMP)... But I kept it there for more cleaner patches built on the top. Thanks, Michal Ashok Reddy Soma (5): Revert "mmc: zynq: parse dt when probing" mmc: zynq_sdhci: Define timing macro's mmc: zynq_sdhci: Set tapdelays based on clk phase delays mmc: zynq_sdhci: Add clock phase delays for Versal mmc: zynq_sdhci: Extend UHS timings till hs200 Michal Simek (2): mmc: zynq_sdhci: Move macro to the top mmc: zynq_sdhci: Read clock phase delays from dt drivers/mmc/sdhci.c | 3 +- drivers/mmc/zynq_sdhci.c | 406 ++++++++++++++++++++++++++++++++++++--- include/mmc.h | 13 ++ include/sdhci.h | 1 + 4 files changed, 398 insertions(+), 25 deletions(-)