From patchwork Fri Oct 26 05:49:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Shinde X-Patchwork-Id: 12532 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id AA3FE23E01 for ; Fri, 26 Oct 2012 05:48:06 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id BDE3AA1917F for ; Fri, 26 Oct 2012 05:48:05 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id e10so3197129iej.11 for ; Thu, 25 Oct 2012 22:48:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:x-auditid :from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :dlp-filter:x-mtr:x-brightmail-tracker:x-brightmail-tracker :x-cfilter-loop:x-gm-message-state; bh=4etY883bDeNKZ5r1wocVvjunFliaPJXuCe2GKCrgAp8=; b=YaLqnwMUwZZAVQplHcS3T5dPYNC9DNPEwCvc/z4mHtCqRKcTphlpQzZN624oif6u0P Wyst6d7a+OQutgYsgzp7RvkBSyMEVznR8BYxE/ZgbLZzoVqwWWYpge4tTEmBiR5HIkzF g2bSur1N5zI3XbEA8lD6ky8gahCWgT30dmDO8lyTP9SpcyJKLBJNLqQUlfxwrXMYXzHm LNC3Ze4aMXTESWo+p1RI+F+U4xvlZXnM+nUB00GSWfmmMtpHVFxLpKEgJEG1eQdRnEjV q4V3kBxSdb5Jd2NKxQl8wYgGgsIxwKKea7gFXccL13ULhoVYtaT4rRbqp7M0tx7Bp7Jv GyGg== Received: by 10.43.7.132 with SMTP id oo4mr18609979icb.6.1351230485177; Thu, 25 Oct 2012 22:48:05 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp191398igt; Thu, 25 Oct 2012 22:48:04 -0700 (PDT) Received: by 10.66.75.162 with SMTP id d2mr59092015paw.27.1351230484404; Thu, 25 Oct 2012 22:48:04 -0700 (PDT) Received: from mailout3.samsung.com (mailout3.samsung.com. [203.254.224.33]) by mx.google.com with ESMTP id o10si783036paw.180.2012.10.25.22.48.04; Thu, 25 Oct 2012 22:48:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) client-ip=203.254.224.33; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MCH00M6MK2R1990@mailout3.samsung.com>; Fri, 26 Oct 2012 14:48:03 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.122]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 58.C8.01231.3142A805; Fri, 26 Oct 2012 14:48:03 +0900 (KST) X-AuditID: cbfee61a-b7fa66d0000004cf-49-508a2413babf Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id C7.C8.01231.2142A805; Fri, 26 Oct 2012 14:48:02 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MCH0021JJY1HB30@mmp1.samsung.com>; Fri, 26 Oct 2012 14:48:02 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, alim.akhtar@samsung.com, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org Subject: [PATCH 4/9 V4] EXYNOS: Add I2S registers Date: Fri, 26 Oct 2012 11:19:25 +0530 Message-id: <1351230570-21597-5-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1351230570-21597-1-git-send-email-rajeshwari.s@samsung.com> References: <1351230570-21597-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsWyRsSkSldYpSvAYPU1TouH62+yWEw5/IXF gcnjzrU9bAGMUVw2Kak5mWWpRfp2CVwZP94+ZSy4IVbx9MdntgbG1UJdjJwcEgImEtPWvGOH sMUkLtxbz9bFyMUhJLCUUWLRtaOMMEVN89+wgthCAosYJS5+soQomsgk8XT1bzaQBJuAkcTW k9PAGkQEJCR+9V8Fsjk4mAVKJaZMzAMJCwsYSlw/dpMFxGYRUJW4MX8uE4jNK+AhcaFlKRPE LgWJY1O/gu3iFPCUuPTnJxPEXg+Jxef2MkH0Ckh8m3yIBWS8hICsxKYDzCDnSAjcZpOY/6aD GWKOpMTBFTdYJjAKL2BkWMUomlqQXFCclJ5rqFecmFtcmpeul5yfu4kRGIyn/z2T2sG4ssHi EKMAB6MSD29ESmeAEGtiWXFl7iFGCQ5mJRHe3VOBQrwpiZVVqUX58UWlOanFhxh9gC6ZyCwl mpwPjJS8knhDYxNzU2NTSyMjM1NTHMJK4rzNHikBQgLpiSWp2ampBalFMOOYODilGhi3yiy7 ymLAMs125uaDC5uaGxem3br/9sW314u/XznUdFex49vEoNeq1+SlL+rFnrHztfrxIujQusnr FX0Zfoa+OPunmz3GVnf5vR+nzv5m3Z3UszVC6S3r83TbhDzNulk6u/YfvByrsIzz7pRLd/1n mJWwb/HUkJNr+B5QIjNpTsA0n8WVhdJ/lViKMxINtZiLihMBpPJsT3MCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42I5/e+xgK6QSleAwcceU4uH62+yWEw5/IXF gcnjzrU9bAGMUQ2MNhmpiSmpRQqpecn5KZl56bZK3sHxzvGmZgaGuoaWFuZKCnmJuam2Si4+ AbpumTlAs5UUyhJzSoFCAYnFxUr6dpgmhIa46VrANEbo+oYEwfUYGaCBhDWMGT/ePmUsuCFW 8fTHZ7YGxtVCXYycHBICJhJN89+wQthiEhfurWcDsYUEFjFKXPxk2cXIBWRPZJJ4uvo3WIJN wEhi68lpjCC2iICExK/+q0A2BwezQKnElIl5IGFhAUOJ68dusoDYLAKqEjfmz2UCsXkFPCQu tCxlgtilIHFs6lewvZwCnhKX/vxkgtjrIbH43F6mCYy8CxgZVjGKphYkFxQnpeca6hUn5haX 5qXrJefnbmIEh/ozqR2MKxssDjEKcDAq8fBGpHQGCLEmlhVX5h5ilOBgVhLh3T0VKMSbklhZ lVqUH19UmpNafIjRB+iqicxSosn5wDjMK4k3NDYxNzU2tTSxMDGzxCGsJM7b7JESICSQnliS mp2aWpBaBDOOiYNTqoFxzto5zy+fTBM/nzbZ/SjHxpexO6Q3OATYPm04+GyS5YOv37afnc22 6//pVsbn0xbcut96zWCC0/1j/3ouBLWzzWKufXeKhUt0++fvZntuvbdg0ZHS9DROqzqwe9ry Q2LHK5YxZ2X93F3ZszKxPt532X3+aS8uVa0uFXPM70mLvXfwfUR15oOmh0osxRmJhlrMRcWJ AIgrnYiiAgAA X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQmngiKo/nNit1cN/NPy92fFG7dbmvNPUcldIzblenHRFNgrFjuENw6w7PvqBtE42tUBLTbs This patch add I2S registers Signed-off-by: R. Chandrasekar Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes in V2: - None Changes in V3: - None Changes in V4: - None arch/arm/include/asm/arch-exynos/i2s-regs.h | 66 +++++++++++++++++++++++++++ 1 files changed, 66 insertions(+), 0 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/i2s-regs.h diff --git a/arch/arm/include/asm/arch-exynos/i2s-regs.h b/arch/arm/include/asm/arch-exynos/i2s-regs.h new file mode 100644 index 0000000..2326ca0 --- /dev/null +++ b/arch/arm/include/asm/arch-exynos/i2s-regs.h @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * R. Chandrasekar + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __I2S_REGS_H__ +#define __I2S_REGS_H__ + +#define CON_TXFIFO_FULL (1 << 8) +#define CON_TXCH_PAUSE (1 << 4) +#define CON_ACTIVE (1 << 0) + +#define MOD_BLCP_SHIFT 24 +#define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT) +#define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT) +#define MOD_BLCP_24BIT (2 << MOD_BLCP_SHIFT) +#define MOD_BLCP_MASK (3 << MOD_BLCP_SHIFT) + +#define MOD_BLC_16BIT (0 << 13) +#define MOD_BLC_8BIT (1 << 13) +#define MOD_BLC_24BIT (2 << 13) +#define MOD_BLC_MASK (3 << 13) + +#define MOD_SLAVE (1 << 11) +#define MOD_MASK (3 << 8) +#define MOD_LR_LLOW (0 << 7) +#define MOD_LR_RLOW (1 << 7) +#define MOD_SDF_IIS (0 << 5) +#define MOD_SDF_MSB (1 << 5) +#define MOD_SDF_LSB (2 << 5) +#define MOD_SDF_MASK (3 << 5) +#define MOD_RCLK_256FS (0 << 3) +#define MOD_RCLK_512FS (1 << 3) +#define MOD_RCLK_384FS (2 << 3) +#define MOD_RCLK_768FS (3 << 3) +#define MOD_RCLK_MASK (3 << 3) +#define MOD_BCLK_32FS (0 << 1) +#define MOD_BCLK_48FS (1 << 1) +#define MOD_BCLK_16FS (2 << 1) +#define MOD_BCLK_24FS (3 << 1) +#define MOD_BCLK_MASK (3 << 1) + +#define MOD_CDCLKCON (1 << 12) + +#define FIC_TXFLUSH (1 << 15) +#define FIC_RXFLUSH (1 << 7) + +#endif /* __I2S_REGS_H__ */