From patchwork Fri Mar 15 06:23:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Inderpal Singh X-Patchwork-Id: 15369 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5708E23E00 for ; Fri, 15 Mar 2013 06:23:40 +0000 (UTC) Received: from mail-ve0-f175.google.com (mail-ve0-f175.google.com [209.85.128.175]) by fiordland.canonical.com (Postfix) with ESMTP id D9C0BA18591 for ; Fri, 15 Mar 2013 06:23:39 +0000 (UTC) Received: by mail-ve0-f175.google.com with SMTP id cy12so2361014veb.34 for ; Thu, 14 Mar 2013 23:23:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=iGdHL0LF+nL7A6jeTzLWjdu8MCthhPCxycKmd1HG05k=; b=DclxHM2QqfQUIocZsAcKJDLIfgymBqhknjra6XfUpn6MM9OhnFD2OUEcTbJ8gIJMsA QX/8mUSeiUcmmCdqC94Cmop9WsscvpgX+FJaQvZypzEry0OyYxVSakUe94g2kjXsMVge GFZgYTRMr1iizkRF9tz5CrH+Ky1BGhsoleSJ9mPvPzBDX/KvKTM7dqVndD+qTd9sW/VH zs70N0eYCuDUi2ZYst/3UkgeZwo5kXTX6rmFtno4DeBirgu0bCuiM7tJLsxz+srS2RZs KJqfBC1OLZ4c068fBHidyi199+tFB/7+VGE9DNG7EBrj5wwXB9wR5OyRUX0NRoXwYLVQ m9aA== X-Received: by 10.220.214.6 with SMTP id gy6mr5294592vcb.8.1363328619368; Thu, 14 Mar 2013 23:23:39 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.127.98 with SMTP id nf2csp105978veb; Thu, 14 Mar 2013 23:23:38 -0700 (PDT) X-Received: by 10.68.116.169 with SMTP id jx9mr12872973pbb.94.1363328618448; Thu, 14 Mar 2013 23:23:38 -0700 (PDT) Received: from mail-pb0-f53.google.com (mail-pb0-f53.google.com [209.85.160.53]) by mx.google.com with ESMTPS id ol9si8556647pbb.317.2013.03.14.23.23.37 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 14 Mar 2013 23:23:38 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.160.53 is neither permitted nor denied by best guess record for domain of inderpal.singh@linaro.org) client-ip=209.85.160.53; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.160.53 is neither permitted nor denied by best guess record for domain of inderpal.singh@linaro.org) smtp.mail=inderpal.singh@linaro.org Received: by mail-pb0-f53.google.com with SMTP id un1so3369616pbc.26 for ; Thu, 14 Mar 2013 23:23:37 -0700 (PDT) X-Received: by 10.68.25.201 with SMTP id e9mr12758235pbg.145.1363328617665; Thu, 14 Mar 2013 23:23:37 -0700 (PDT) Received: from inder-ubuntu.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPS id qp13sm7145601pbb.3.2013.03.14.23.23.34 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 14 Mar 2013 23:23:36 -0700 (PDT) From: Inderpal Singh To: u-boot@lists.denx.de Cc: promsoft@gmail.com, chander.kashyap@linaro.org, patches@linaro.org Subject: [PATCH v2 2/3] exynos: update tzpc_init to make it common for exynos4 and exynos5 Date: Fri, 15 Mar 2013 11:53:21 +0530 Message-Id: <1363328602-5676-3-git-send-email-inderpal.singh@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1363328602-5676-1-git-send-email-inderpal.singh@linaro.org> References: <1363328602-5676-1-git-send-email-inderpal.singh@linaro.org> X-Gm-Message-State: ALoCoQm2+et2bdRtJG9pHDzAwoZUATKe+8GbV8mTl8CVLEt9i+zm7tXPD0m8CmXNQtp2ZCiUxAlN This requires that cpu_is_exynos4/5 should be made available before tzpc_init. Hence this patch also makes necessary changes to have cpu_info in spl and invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250. Signed-off-by: Inderpal Singh Acked-by: Chander Kashyap --- arch/arm/cpu/armv7/exynos/tzpc_init.c | 15 ++++++++++++--- arch/arm/cpu/armv7/s5p-common/Makefile | 2 ++ board/samsung/smdk5250/lowlevel_init.S | 2 ++ spl/Makefile | 4 ++++ 4 files changed, 20 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/tzpc_init.c b/arch/arm/cpu/armv7/exynos/tzpc_init.c index 81adb4b..5204fb1 100644 --- a/arch/arm/cpu/armv7/exynos/tzpc_init.c +++ b/arch/arm/cpu/armv7/exynos/tzpc_init.c @@ -22,6 +22,7 @@ * MA 02111-1307 USA */ +#include #include #include @@ -29,12 +30,20 @@ void tzpc_init(void) { struct exynos_tzpc *tzpc; - unsigned int addr; + unsigned int addr, start = 0, end = 0; - for (addr = TZPC0_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) { + if (cpu_is_exynos5()) { + start = TZPC0_BASE; + end = TZPC9_BASE; + } else if (cpu_is_exynos4()) { + start = TZPC1_BASE; + end = TZPC6_BASE; + } + + for (addr = start; addr <= end; addr += TZPC_BASE_OFFSET) { tzpc = (struct exynos_tzpc *)addr; - if (addr == TZPC0_BASE) + if (addr == start) writel(R0SIZE, &tzpc->r0size); writel(DECPROTXSET, &tzpc->decprot0set); diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile index 1705399..0c38bd0 100644 --- a/arch/arm/cpu/armv7/s5p-common/Makefile +++ b/arch/arm/cpu/armv7/s5p-common/Makefile @@ -26,9 +26,11 @@ include $(TOPDIR)/config.mk LIB = $(obj)libs5p-common.o COBJS-y += cpu_info.o +ifndef CONFIG_SPL_BUILD COBJS-y += timer.o COBJS-y += sromc.o COBJS-$(CONFIG_PWM) += pwm.o +endif SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) diff --git a/board/samsung/smdk5250/lowlevel_init.S b/board/samsung/smdk5250/lowlevel_init.S index bc6cb6f..edc565e 100644 --- a/board/samsung/smdk5250/lowlevel_init.S +++ b/board/samsung/smdk5250/lowlevel_init.S @@ -75,12 +75,14 @@ lowlevel_init: bl mem_ctrl_init 1: + bl arch_cpu_init bl tzpc_init ldmia r13!, {ip,pc} wakeup_reset: bl system_clock_init bl mem_ctrl_init + bl arch_cpu_init bl tzpc_init exit_wakeup: diff --git a/spl/Makefile b/spl/Makefile index 101d478..8d33210 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -92,6 +92,10 @@ LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o endif +ifeq ($(SOC),exynos) +LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o +endif + # Add GCC lib ifeq ("$(USE_PRIVATE_LIBGCC)", "yes") PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o