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[203.254.224.25]) by mx.google.com with ESMTP id bc2si9169975pad.158.1969.12.31.16.00.00; Tue, 08 Oct 2013 03:48:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.25 as permitted sender) client-ip=203.254.224.25; Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MUC00AHSJCFX9N0@mailout2.samsung.com>; Tue, 08 Oct 2013 19:48:43 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.125]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 77.99.29948.B03E3525; Tue, 08 Oct 2013 19:48:43 +0900 (KST) X-AuditID: cbfee691-b7f4a6d0000074fc-3d-5253e30b8f9f Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id DD.33.09055.B03E3525; Tue, 08 Oct 2013 19:48:43 +0900 (KST) Received: from localhost.localdomain.com ([107.108.73.95]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MUC00059JCVG700@mmp1.samsung.com>; Tue, 08 Oct 2013 19:48:43 +0900 (KST) From: Rajeshwari S Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, u-boot-review@google.com, jagannadh.teki@gmail.com, alim.akhtar@samsung.com Subject: [PATCH 4/4] spi: exynos: Support word transfers Date: Tue, 08 Oct 2013 16:20:06 +0530 Message-id: <1381229406-12478-5-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.11.7 In-reply-to: <1381229406-12478-1-git-send-email-rajeshwari.s@samsung.com> References: <1381229406-12478-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrHLMWRmVeSWpSXmKPExsWyRsSkVpf7cXCQwezXmhYP5m1js3i4/iaL xa6tLawWHUdaGC2mHP7CYvFtyzZGi+WvN7JbvN3bye7A4TG74SKLx85Zd9k9Fmwq9bhzbQ+b x9k7Oxg9+rasYgxgi+KySUnNySxLLdK3S+DK+NawjrHgt37FqX1rmBoYm1W7GDk5JARMJP5c v8YGYYtJXLi3Hsjm4hASWMoo8ffxO3aYogeHDzFCJBYxSnw8+hyqqotJYsmvVSxdjBwcbEBV G08kgDSICEhI/Oq/yghiMwusZpSY0lAFUiIsYCGx7YkFSJhFQFViyZp1YPN5BTwkpsz9zwix S1FixpJnYDangKfE7Uu3WEBsIaCaD/dfs0LUrGKX6N/PBzFHQOLb5ENgF0gIyEpsOsAMUSIp cXDFDZYJjMILGBlWMYqmFiQXFCelF5nqFSfmFpfmpesl5+duYgSG/el/zybuYLx/wPoQYzLQ uInMUqLJ+cC4ySuJNzQ2M7IwNTE1NjK3NCNNWEmcV73FOlBIID2xJDU7NbUgtSi+qDQntfgQ IxMHp1QDo5zpwmcr1qt2rC29v3WqymrLFZ9cpmqkNP2aycqbNpfJvY6N7/31/TxZ1hoXV/2y it2y9W1P6YRrm1M/8BanVdV9n8Tyabqkn1Q1w/G8yBeBJoeSd8rf2vHp53OZ72n//lqJK3hU Vu5SuH330fqTJ5c9yDA+e+SGk91VrbLnEQXTGaKf9B460azEUpyRaKjFXFScCACpF1CvkQIA AA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsVy+t9jAV3ux8FBBot3KFk8mLeNzeLh+pss Fru2trBadBxpYbSYcvgLi8W3LdsYLZa/3shu8XZvJ7sDh8fshossHjtn3WX3WLCp1OPOtT1s Hmfv7GD06NuyijGALaqB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfV VsnFJ0DXLTMH6CIlhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8a3hnWM Bb/1K07tW8PUwNis2sXIySEhYCLx4PAhRghbTOLCvfVsXYxcHEICixglPh59DuV0MUks+bWK pYuRg4MNqGPjiQSQBhEBCYlf/VfBmpkFVjNKTGmoAikRFrCQ2PbEAiTMIqAqsWTNOnYQm1fA Q2LK3P9QuxQlZix5BmZzCnhK3L50iwXEFgKq+XD/NesERt4FjAyrGEVTC5ILipPScw31ihNz i0vz0vWS83M3MYLj6pnUDsaVDRaHGAU4GJV4eAUOBwUJsSaWFVfmHmKU4GBWEuENvB8cJMSb klhZlVqUH19UmpNafIgxGeiqicxSosn5wJjPK4k3NDYxNzU2tTSxMDGzJE1YSZz3QKt1oJBA emJJanZqakFqEcwWJg5OqQbGRQXXQjPDetaXK8jvfyO3R2Pto8AALa6AXy8zgrcLLNtYNasp zWaqeqnEEQMtBaaFej8a0+9d0xXbU9f/5yyXcWbtrN6XB1cczQ1J+vuFvSzoqsXOj3mKbx+s XHy4a+q04p/zLd9aLgv+cfn2+Q8XTx9x/y4adj3g7zRHp0bR6rsGawzZF1T0KrEUZyQaajEX FScCAKpyNDDvAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rajeshwari.s@samsung.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Since SPI register access is so expensive, it is worth transferring data a word at a time if we can. This complicates the driver unfortunately. Use the byte-swapping feature to avoid having to convert to/from big endian in software. This change increases speed from about 2MB/s to about 4.5MB/s. Signed-off-by: Simon Glass Signed-off-by: Rajeshwari S Shinde --- arch/arm/include/asm/arch-exynos/spi.h | 11 ++++- drivers/spi/exynos_spi.c | 76 +++++++++++++++++++++++++++------- 2 files changed, 71 insertions(+), 16 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/spi.h b/arch/arm/include/asm/arch-exynos/spi.h index fb23aa6..147c1a7 100644 --- a/arch/arm/include/asm/arch-exynos/spi.h +++ b/arch/arm/include/asm/arch-exynos/spi.h @@ -22,7 +22,7 @@ struct exynos_spi { unsigned int rx_data; /* 0x1c */ unsigned int pkt_cnt; /* 0x20 */ unsigned char reserved2[4]; - unsigned char reserved3[4]; + unsigned int swap_cfg; /* 0x28 */ unsigned int fb_clk; /* 0x2c */ unsigned char padding[0xffd0]; }; @@ -62,5 +62,14 @@ struct exynos_spi { /* Packet Count */ #define SPI_PACKET_CNT_EN (1 << 16) +/* Swap config */ +#define SPI_TX_SWAP_EN (1 << 0) +#define SPI_TX_BYTE_SWAP (1 << 2) +#define SPI_TX_HWORD_SWAP (1 << 3) +#define SPI_TX_BYTE_SWAP (1 << 2) +#define SPI_RX_SWAP_EN (1 << 4) +#define SPI_RX_BYTE_SWAP (1 << 6) +#define SPI_RX_HWORD_SWAP (1 << 7) + #endif /* __ASSEMBLY__ */ #endif diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 7407d6c..699c57e 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -204,12 +204,29 @@ static void spi_get_fifo_levels(struct exynos_spi *regs, * * @param regs SPI peripheral registers * @param count Number of bytes to transfer + * @param step Number of bytes to transfer in each packet (1 or 4) */ -static void spi_request_bytes(struct exynos_spi *regs, int count) +static void spi_request_bytes(struct exynos_spi *regs, int count, int step) { + /* For word address we need to swap bytes */ + if (step == 4) { + setbits_le32(®s->mode_cfg, + SPI_MODE_CH_WIDTH_WORD | SPI_MODE_BUS_WIDTH_WORD); + count /= 4; + setbits_le32(®s->swap_cfg, SPI_TX_SWAP_EN | SPI_RX_SWAP_EN | + SPI_TX_BYTE_SWAP | SPI_RX_BYTE_SWAP | + SPI_TX_HWORD_SWAP | SPI_RX_HWORD_SWAP); + } else { + /* Select byte access and clear the swap configuration */ + clrbits_le32(®s->mode_cfg, + SPI_MODE_CH_WIDTH_WORD | SPI_MODE_BUS_WIDTH_WORD); + writel(0, ®s->swap_cfg); + } + assert(count && count < (1 << 16)); setbits_le32(®s->ch_cfg, SPI_CH_RST); clrbits_le32(®s->ch_cfg, SPI_CH_RST); + writel(count | SPI_PACKET_CNT_EN, ®s->pkt_cnt); } @@ -224,6 +241,7 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, int toread; unsigned start = get_timer(0); int stopping; + int step; out_bytes = in_bytes = todo; @@ -231,10 +249,19 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, !(spi_slave->mode & SPI_SLAVE); /* + * Try to transfer words if we can. This helps read performance at + * SPI clock speeds above about 20MHz. + */ + step = 1; + if (!((todo | (uintptr_t)rxp | (uintptr_t)txp) & 3) && + !spi_slave->skip_preamble) + step = 4; + + /* * If there's something to send, do a software reset and set a * transaction size. */ - spi_request_bytes(regs, todo); + spi_request_bytes(regs, todo, step); /* * Bytes are transmitted/received in pairs. Wait to receive all the @@ -247,14 +274,26 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, /* Keep the fifos full/empty. */ spi_get_fifo_levels(regs, &rx_lvl, &tx_lvl); + + /* + * Don't completely fill the txfifo, since we don't want our + * rxfifo to overflow, and it may already contain data. + */ while (tx_lvl < spi_slave->fifo_size/2 && out_bytes) { - temp = txp ? *txp++ : 0xff; + if (!txp) + temp = -1; + else if (step == 4) + temp = *(uint32_t *)txp; + else + temp = *txp; writel(temp, ®s->tx_data); - out_bytes--; - tx_lvl++; + out_bytes -= step; + if (txp) + txp += step; + tx_lvl += step; } - if (rx_lvl > 0) { - while (rx_lvl > 0) { + if (rx_lvl >= step) { + while (rx_lvl >= step) { temp = readl(®s->rx_data); if (spi_slave->skip_preamble) { if (temp == SPI_PREAMBLE_END_BYTE) { @@ -262,12 +301,15 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, stopping = 0; } } else { - if (rxp || stopping) - *rxp++ = temp; - in_bytes--; + if (rxp || stopping) { + *rxp = temp; + rxp += step; + } + in_bytes -= step; } - toread--; - rx_lvl--; + toread -= step; + rx_lvl -= step; + } } else if (!toread) { /* * We have run out of input data, but haven't read @@ -279,7 +321,7 @@ static int spi_rx_tx(struct exynos_spi_slave *spi_slave, int todo, out_bytes = in_bytes; toread = in_bytes; txp = NULL; - spi_request_bytes(regs, toread); + spi_request_bytes(regs, toread, step); } if (spi_slave->skip_preamble && get_timer(start) > 100) { printf("SPI timeout: in_bytes=%d, out_bytes=%d, ", @@ -323,10 +365,14 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, if ((flags & SPI_XFER_BEGIN)) spi_cs_activate(slave); - /* Exynos SPI limits each transfer to 65535 bytes */ + /* + * Exynos SPI limits each transfer to 65535 transfers. To keep + * things simple, allow a maximum of 65532 bytes. We could allow + * more in word mode, but the performance difference is small. + */ bytelen = bitlen / 8; for (upto = 0; !ret && upto < bytelen; upto += todo) { - todo = min(bytelen - upto, (1 << 16) - 1); + todo = min(bytelen - upto, (1 << 16) - 4); ret = spi_rx_tx(spi_slave, todo, &din, &dout, flags); if (ret) break;