From patchwork Thu Apr 21 02:55:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 66282 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp2851940qge; Wed, 20 Apr 2016 22:59:00 -0700 (PDT) X-Received: by 10.194.134.134 with SMTP id pk6mr12251831wjb.176.1461218340065; Wed, 20 Apr 2016 22:59:00 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id r124si1722391wma.9.2016.04.20.22.58.59; Wed, 20 Apr 2016 22:59:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5BDF3B3A1E; Thu, 21 Apr 2016 07:49:15 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GVNyew1COaaQ; Thu, 21 Apr 2016 07:49:15 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0DA9DA7A0A; Thu, 21 Apr 2016 07:44:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2711FA7608 for ; Thu, 21 Apr 2016 04:55:37 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IqVezQz4ZoLX for ; Thu, 21 Apr 2016 04:55:36 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-07.nifty.com (conuserg-07.nifty.com [210.131.2.74]) by theia.denx.de (Postfix) with ESMTPS id ED14BA761A for ; Thu, 21 Apr 2016 04:54:59 +0200 (CEST) Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id u3L2sQat017163; Thu, 21 Apr 2016 11:54:33 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com u3L2sQat017163 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1461207273; bh=Szrhitz8o0bKbGewtMYBLtXTXEnDAHe5kH5TdfD3Mks=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VvMHxDVgKrs10McnnDMs2DdASYbNnHhg/h61e7Y8VUVaLSdjfPWAsKABlbZDY/cwk H/jqgIXcBqRVdhTB4Q5RNpQn5Gs09m9KCWGRJ0uF+1WMSNMQNPpqIkIrfKKDcJ+Zgm hK10S0wqUNO0bLO/xbxpQN8t9hZ1NjrAf7lS4I0GJ2tAWCuFRu9j84/zzoAABYy/Bl 2tNh2jXVGuXcgQaKSj/GehyVnqsPuo5HMCY4Pg3AhLi3UcgPUzPtU8KniOdmJvfrad rhUq5Ix3MtN2llBJlahNFpuEyovqjty5T+PWsJM2GDxn8RcgIj3EjBJjScRf6MLqtp RXmit1AgjA0HQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Thu, 21 Apr 2016 11:55:11 +0900 Message-Id: <1461207314-32272-9-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461207314-32272-1-git-send-email-yamada.masahiro@socionext.com> References: <1461207314-32272-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH v3 08/11] ARM: uniphier: reserve the last 64 byte of SDRAM X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The last 64 byte of each DDR channel of PH1-LD20 is periodically used as a scratch area for the DDR PHY training. Signed-off-by: Masahiro Yamada --- Changes in v3: None Changes in v2: None include/configs/uniphier.h | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index fb405a9..a25ac8d 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -259,6 +259,8 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_NR_DRAM_BANKS 2 +/* for LD20; the last 64 byte is used for dynamic DDR PHY training */ +#define CONFIG_SYS_MEM_TOP_HIDE 64 #if defined(CONFIG_ARM64) #define CONFIG_SPL_TEXT_BASE 0x30000000