From patchwork Tue Aug 30 06:56:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 74946 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp1991534qga; Mon, 29 Aug 2016 23:55:17 -0700 (PDT) X-Received: by 10.194.57.244 with SMTP id l20mr1659312wjq.1.1472540117371; Mon, 29 Aug 2016 23:55:17 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id v207si16178873wmv.86.2016.08.29.23.55.17; Mon, 29 Aug 2016 23:55:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BBA5AA7594; Tue, 30 Aug 2016 08:55:16 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id nBEqsk433KGw; Tue, 30 Aug 2016 08:55:16 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 06F81A7550; Tue, 30 Aug 2016 08:55:16 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8EAE8A7550 for ; Tue, 30 Aug 2016 08:55:11 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fQC4v1pw6Mkm for ; Tue, 30 Aug 2016 08:55:11 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id CC234A7578 for ; Tue, 30 Aug 2016 08:55:10 +0200 (CEST) Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-11.nifty.com with ESMTP id u7U6sOdO027520; Tue, 30 Aug 2016 15:54:27 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com u7U6sOdO027520 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1472540068; bh=vVO6PODCeB5xu6/OS3hBsW9xc00vOHUJLFT/joo5G8s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ta4iXpYEUr65dk4GgPBB1wWe53PxS5qWoILIlTOzupivp1Ku2ynt9HHuMaSP83Vl2 pkzn8oQfCnQq0saKjay9eVBVTxpmNogAs1XQy8evFQ7pX9hOS+KGan/lGDSKbwUDWT fpqy9TUEmCIkq+CYcoALJiclcGS0uf9qgUEXJvWnVGHyc0Hns1nvu2pHlfiSQarSkx B1n2iEFy61C+te0DoSUr86ADKqALIzWzokzpUUru0K5gswhsyiz7JafmH4naMcXG9i 3Ikwpgtja/rg8rm92W7jOI/XPtEi8CRasgMOMnoRGn9N36p5k8dj8SFKFuZkCRhnFp kzHMmenuEl62g== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Tue, 30 Aug 2016 15:56:30 +0900 Message-Id: <1472540191-18245-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1472540191-18245-1-git-send-email-yamada.masahiro@socionext.com> References: <1472540191-18245-1-git-send-email-yamada.masahiro@socionext.com> Cc: Stephen Warren , Stefan Agner , Alison Wang , Tom Warren , Ian Campbell , Fabio Estevam Subject: [U-Boot] [PATCH 3/4] ARM: armv7: move CONFIG_ARMV7_PSCI to Kconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms can select. Then, move CONFIG_ARMV7_PSCI, which is automatically enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled. Signed-off-by: Masahiro Yamada --- arch/arm/Kconfig | 3 +++ arch/arm/cpu/armv7/Kconfig | 10 ++++++++++ arch/arm/cpu/armv7/mx7/Kconfig | 1 + arch/arm/mach-tegra/tegra124/Kconfig | 1 + arch/arm/mach-uniphier/Kconfig | 1 + board/sunxi/Kconfig | 5 +++++ include/configs/jetson-tk1.h | 1 - include/configs/ls1021aqds.h | 1 - include/configs/ls1021atwr.h | 1 - include/configs/mx7_common.h | 1 - include/configs/sun6i.h | 1 - include/configs/sun7i.h | 1 - include/configs/sun8i.h | 1 - include/configs/uniphier.h | 1 - 14 files changed, 21 insertions(+), 8 deletions(-) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c871eaf..37fee43 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -816,10 +816,13 @@ config TARGET_LS1021AQDS bool "Support ls1021aqds" select CPU_V7 select SUPPORT_SPL + select ARCH_SUPPORT_PSCI + config TARGET_LS1021ATWR bool "Support ls1021atwr" select CPU_V7 select SUPPORT_SPL + select ARCH_SUPPORT_PSCI config TARGET_LS1043AQDS bool "Support ls1043aqds" diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index 41c6639..4390f59 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig @@ -6,6 +6,9 @@ config CPU_V7_HAS_NONSEC config CPU_V7_HAS_VIRT bool +config ARCH_SUPPORT_PSCI + bool + config ARMV7_NONSEC bool "Enable support for booting in non-secure mode" if EXPERT depends on CPU_V7_HAS_NONSEC @@ -31,6 +34,13 @@ config ARMV7_VIRT ---help--- Say Y here to boot in hypervisor (HYP) mode when booting non-secure. +config ARMV7_PSCI + bool "Enable PSCI support" if EXPERT + depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI + default y + help + Say Y here to enable PSCI support. + config ARMV7_LPAE bool "Use LPAE page table format" if EXPERT depends on CPU_V7 diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig index 5fdc8dd..fb00b8c 100644 --- a/arch/arm/cpu/armv7/mx7/Kconfig +++ b/arch/arm/cpu/armv7/mx7/Kconfig @@ -5,6 +5,7 @@ config MX7 select ROM_UNIFIED_SECTIONS select CPU_V7_HAS_VIRT select CPU_V7_HAS_NONSEC + select ARCH_SUPPORT_PSCI default y config MX7D diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig index 44f63f7..f97eb85 100644 --- a/arch/arm/mach-tegra/tegra124/Kconfig +++ b/arch/arm/mach-tegra/tegra124/Kconfig @@ -8,6 +8,7 @@ config TARGET_JETSON_TK1 bool "NVIDIA Tegra124 Jetson TK1 board" select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select ARCH_SUPPORT_PSCI config TARGET_NYAN_BIG bool "Google/NVIDIA Nyan-big Chromebook" diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 8961458..7bee6c7 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -8,6 +8,7 @@ config ARCH_UNIPHIER_32BIT select CPU_V7 select CPU_V7_HAS_NONSEC select ARMV7_NONSEC + select ARCH_SUPPORT_PSCI config ARCH_UNIPHIER_64BIT bool diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 1b30669..4e91f49 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -37,6 +37,7 @@ config MACH_SUN6I select CPU_V7 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select ARCH_SUPPORT_PSCI select SUNXI_GEN_SUN6I select SUPPORT_SPL select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT @@ -46,6 +47,7 @@ config MACH_SUN7I select CPU_V7 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select ARCH_SUPPORT_PSCI select SUNXI_GEN_SUN4I select SUPPORT_SPL select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT @@ -55,6 +57,7 @@ config MACH_SUN8I_A23 select CPU_V7 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select ARCH_SUPPORT_PSCI select SUNXI_GEN_SUN6I select SUPPORT_SPL select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT @@ -64,6 +67,7 @@ config MACH_SUN8I_A33 select CPU_V7 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select ARCH_SUPPORT_PSCI select SUNXI_GEN_SUN6I select SUPPORT_SPL select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT @@ -79,6 +83,7 @@ config MACH_SUN8I_H3 select CPU_V7 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select ARCH_SUPPORT_PSCI select SUNXI_GEN_SUN6I select SUPPORT_SPL select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 2b172a5..1eba74a 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -60,7 +60,6 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -#define CONFIG_ARMV7_PSCI 1 #define CONFIG_ARMV7_PSCI_NR_CPUS 4 /* Reserve top 1M for secure RAM */ #define CONFIG_ARMV7_SECURE_BASE 0xfff00000 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 47180f9..86969a1 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -9,7 +9,6 @@ #define CONFIG_LS102XA -#define CONFIG_ARMV7_PSCI #define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 2f19950..d0fc7ff 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -9,7 +9,6 @@ #define CONFIG_LS102XA -#define CONFIG_ARMV7_PSCI #define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 7295fa6..52c0d0f 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -72,7 +72,6 @@ #define CONFIG_CMD_FUSE #define CONFIG_MXC_OCOTP -#define CONFIG_ARMV7_PSCI #define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE 0x00900000 diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index 0625502..41552c4 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -22,7 +22,6 @@ #define CONFIG_SUNXI_USB_PHYS 3 -#define CONFIG_ARMV7_PSCI 1 #define CONFIG_ARMV7_PSCI_NR_CPUS 4 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index e9074d5..63760c5 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -20,7 +20,6 @@ #define CONFIG_SUNXI_USB_PHYS 3 -#define CONFIG_ARMV7_PSCI 1 #define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index b9a8731..151ffdc 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -27,7 +27,6 @@ #endif #ifndef CONFIG_MACH_SUN8I_A83T -#define CONFIG_ARMV7_PSCI 1 #if defined(CONFIG_MACH_SUN8I_A23) #define CONFIG_ARMV7_PSCI_NR_CPUS 2 #elif defined(CONFIG_MACH_SUN8I_A33) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 55ba99c..66696c2 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -11,7 +11,6 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__ -#define CONFIG_ARMV7_PSCI #define CONFIG_ARMV7_PSCI_1_0 #define CONFIG_ARMV7_PSCI_NR_CPUS 4