From patchwork Thu Jul 13 11:32:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 107669 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp2096327qge; Thu, 13 Jul 2017 04:32:52 -0700 (PDT) X-Received: by 10.80.146.79 with SMTP id j15mr2663226eda.17.1499945572497; Thu, 13 Jul 2017 04:32:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499945572; cv=none; d=google.com; s=arc-20160816; b=guhmxkFZjjV/rwmrdnSCAD5X97XUlcnQIiWzbqVKVgx0Zjl+EzEG4hrjp3pWPxWyfF gbwk9yGGBKRWYyGLEsOvtLbxCTla36V4fqgkKwX2IynIQk+n1trraAC6v3Nnc5lR2OSO JbdMSrBg/HaeERhWw1TxI0yWzUvsJov+oE1RfAq8AaNnEpGLdBLpFIEUSIxRok7TIho1 GFVuRjZZL2oznjuKsdrKGpODismeWpYXccowZtP67VL0v/p7vRh3Vs3L3vFu2X68IL8+ d1fegdRYeEDG1GD+2U5/FYCQgkGuRX+BkR5M9EOrE4Yb775yE2K4oYVH8xvHsKXpU4y4 5EIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=3mUFu/wkV1ZRqeo4N2eJ96/OkH4OgJFJUVRtUSaboNk=; b=WaeB7hKlLF54weyBkVAe89U07gpKCDWeJx5vacv5k74S8d5+08eph7Xf4E9FrCNHCJ DFWIv0oe1Yza6XNPWFuly7IsoDWctm4o/I7Hk/6Kgp0GeUp38MApvaoFqBFl7NL2tWvQ ul5rG1a6nU764Ht2qW3cKbFLohBdbZWYTZCMWHK5TDhK/TOnsHM229uDuz6ZBs2nnf7u VmmcZTyzARRft9BhRqokhnlSKseODFPQz9oCz0v1P5UDq2mKhCt3k1nE1vUBebfDik15 iomimZp0DWLvwAIdHnwmSe/8i7kziywVhOENoMVpGT449sqKZ547IQcL7pgkBc5rn8es LVyA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.b=2wTVaAM3; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id o5si4011580eda.242.2017.07.13.04.32.51; Thu, 13 Jul 2017 04:32:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.b=2wTVaAM3; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id C39A0C21E51; Thu, 13 Jul 2017 11:32:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 30413C21DFF; Thu, 13 Jul 2017 11:32:47 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 97852C21E05; Thu, 13 Jul 2017 11:32:45 +0000 (UTC) Received: from conuserg-10.nifty.com (conuserg-10.nifty.com [210.131.2.77]) by lists.denx.de (Postfix) with ESMTPS id 96E0FC21E01 for ; Thu, 13 Jul 2017 11:32:44 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-10.nifty.com with ESMTP id v6DBWOJ8003090; Thu, 13 Jul 2017 20:32:25 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v6DBWOJ8003090 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1499945545; bh=zxmJgYdvbDPHmVL4oE2h25onW+0NxxEPt0YePP1CPbI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=2wTVaAM38XPZMwraGrYO4OJZ8YRaQiWhXMrXO4L85vANdJaIYuEC20EfuLhjfo3Br TS/e2/CSmxH4qgHk3Li2rWk48Yvz+qEZeP7FOf5hVfeExbm1LTBfPw5B1WI/QoVJgl oxsTk6NjSa4S6be21tjqCMwiKHwsQ2HuVWSF+OQWoA7BcShMK6luGqjpfcKKVinffW EoBI+OFSooEoLUVwvQ1FktU0W2jqaNmUX+9o+2h+jEUnzNcERX4uPNJyY1ngBd+l57 RO67fPHs/fj8NEkOwdnlQaHCGBLC/NK6GpwKAg0Z353Z/v4ZiaQkfE4G0VTXsLylEd 7U4BQ1Ho82+hg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Thu, 13 Jul 2017 20:32:16 +0900 Message-Id: <1499945538-14452-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499945538-14452-1-git-send-email-yamada.masahiro@socionext.com> References: <1499945538-14452-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 2/4] doc: uniphier: rework README.uniphier X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Rework the readme to reflect the latest boot mechanism on ARMv8 SoCs. Signed-off-by: Masahiro Yamada --- doc/README.uniphier | 118 ++++++++++++++++++++++++++-------------------------- 1 file changed, 59 insertions(+), 59 deletions(-) diff --git a/doc/README.uniphier b/doc/README.uniphier index e2f3b9a2ec23..f21c9d09ce3e 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -5,7 +5,7 @@ U-Boot for UniPhier SoC family Recommended toolchains ---------------------- -The UniPhir platform is well tested with Linaro toolchanis. +The UniPhier platform is well tested with Linaro toolchains. You can download pre-built toolchains from: http://www.linaro.org/downloads/ @@ -14,97 +14,97 @@ You can download pre-built toolchains from: Compile the source ------------------ -sLD3 reference board: - $ make uniphier_sld3_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- +The source can be configured and built with the following commands: -LD4 reference board: - $ make uniphier_ld4_sld8_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- + $ make + $ make CROSS_COMPILE= DEVICE_TREE= -sLD8 reference board: - $ make uniphier_ld4_sld8_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-sld8-ref +The recommended is `arm-linux-gnueabihf-` for 32bit SoCs, +`aarch64-linux-gnu-` for 64bit SoCs, but you may wish to change it to use your +favorite compiler. -Pro4 reference board: - $ make uniphier_pro4_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- +The following tables show and for each board. -Pro4 Ace board: - $ make uniphier_pro4_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pro4-ace +32bit SoC boards: -Pro4 Sanji board: - $ make uniphier_pro4_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pro4-sanji + Board | | +---------------|------------------------------|------------------------------ +sLD3 reference | uniphier_sld3_defconfig | uniphier-sld3-ref (default) +LD4 reference | uniphier_ld4_sld8_defconfig | uniphier-ld4-ref (default) +sld8 reference | uniphier_ld4_sld8_defconfig | uniphier-sld8-def +Pro4 reference | uniphier_pro4_defconfig | uniphier-pro4-ref (default) +Pro4 Ace | uniphier_pro4_defconfig | uniphier-pro4-ace +Pro4 Sanji | uniphier_pro4_defconfig | uniphier-pro4-sanji +Pro5 4KBOX | uniphier_pxs2_ld6b_defconfig | uniphier-pro5-4kbox +PXs2 Gentil | uniphier_pxs2_ld6b_defconfig | uniphier-pxs2-gentil +PXs2 Vodka | uniphier_pxs2_ld6b_defconfig | uniphier-pxs2-vodka (default) +LD6b reference | uniphier_pxs2_ld6b_defconfig | uniphier-ld6b-ref -Pro5 4KBOX Board: - $ make uniphier_pxs2_ld6b_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pro5-4kbox +64bit SoC boards: -PXs2 Gentil board: - $ make uniphier_pxs2_ld6b_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pxs2-gentil + Board | | +---------------|-----------------------|---------------------------- +LD11 reference | uniphier_v8_defconfig | uniphier-ld11-ref +LD11 Global | uniphier_v8_defconfig | uniphier-ld11-global +LD20 reference | uniphier_v8_defconfig | uniphier-ld20-ref (default) +LD20 Global | uniphier_v8_defconfig | uniphier-ld20-global -PXs2 Vodka board: - $ make uniphier_pxs2_ld6b_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- +For example, to compile the source for PXs2 Vodka board, run the following: -LD6b reference board: $ make uniphier_pxs2_ld6b_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-ld6b-ref + $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pxs2-vodka -LD11 reference board: - $ make uniphier_v8_defconfig - $ make CROSS_COMPILE=aarch64-linux-gnu- DEVICE_TREE=uniphier-ld11-ref +The device tree marked as (default) can be omitted. `uniphier-pxs2-vodka` is +the default device tree for the configuration `uniphier_pxs2_ld6b_defconfig`, +so the following gives the same result. -LD20 reference board: - $ make uniphier_v8_defconfig - $ make CROSS_COMPILE=aarch64-linux-gnu- - -PXs3 reference board: - $ make uniphier_v8_defconfig - $ make CROSS_COMPILE=aarch64-linux-gnu- DEVICE_TREE=uniphier-pxs3-ref + $ make uniphier_pxs2_ld6b_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabihf- -You may wish to change the "CROSS_COMPILE=..." to use your favorite compiler. +Booting 32bit SoC boards +------------------------ -Burn U-Boot images to NAND --------------------------- +The build command will generate the following: +- u-boot.bin +- spl/u-boot.bin -Write the following to the NAND device: +U-Boot can boot UniPhier 32bit SoC boards by itself. Flash the generated images +to the storage device (NAND or eMMC) on your board. - spl/u-boot-spl.bin at the offset address 0x00000000 - u-boot.bin at the offset address 0x00020000 -or +The `u-boot-with-spl.bin` is the concatenation of the two (with appropriate +padding), so you can also do: - u-boot-with-spl.bin at the offset address 0x00000000 If a TFTP server is available, the images can be easily updated. Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory, -and then run the following command at the U-Boot command line: +and run the following command at the U-Boot command line: - => run nandupdate +To update the images in NAND: + => run nandupdate -Burn U-Boot images to eMMC --------------------------- +To update the images in eMMC: -Write the following to the Boot partition 1 of the eMMC device: + => run emmcupdate - - spl/u-boot-spl.bin at the offset address 0x00000000 - - u-boot.bin at the offset address 0x00020000 -or +Booting 64bit SoC boards +------------------------ - - u-boot-with-spl.bin at the offset address 0x00000000 +The build command will generate the following: +- u-boot.bin -If a TFTP server is available, the images can be easily updated. -Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory, -and then run the following command at the U-Boot command line: +However, U-Boot is not the first stage loader for UniPhier 64bit SoC boards. +U-Boot serves as a non-secure boot loader loaded by [ARM Trusted Firmware], +so you need to provide the `u-boot.bin` to the build command of ARM Trusted +Firmware. - => run emmcupdate +[ARM Trusted Firmware]: https://github.com/ARM-software/arm-trusted-firmware UniPhier specific commands @@ -179,4 +179,4 @@ newer SoCs. Even if it is, EA[25] is not connected on most of the boards. -- Masahiro Yamada -Jan. 2017 +Jul. 2017