From patchwork Thu Sep 21 14:30:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 113261 Delivered-To: patch@linaro.org Received: by 10.80.163.150 with SMTP id s22csp1963817edb; Thu, 21 Sep 2017 07:39:58 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDseoGTnx0DfQkpkm6XKv9/AdQhTorcm+KCzOOLDRzY42uAOdVseqsNJs8GbISVHXR5r62E X-Received: by 10.80.144.202 with SMTP id d10mr1452524eda.254.1506004798841; Thu, 21 Sep 2017 07:39:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506004798; cv=none; d=google.com; s=arc-20160816; b=0liL76ZiduxnIfq9thkJ7Jgonzm8NdqQPjNVMvhT7xTKEYn/MO3V5p0HutcHuEA5SK xmQPEfsMeewx17pfjhI4UFwH1hY4IH5grm+3auL/OqvXzVfm7Oim70c6mMswaQWhbm5G b/s8MJ+TXG79MU+MlGo2vzxLOPlDfQiniU57upCaXqF2qQ/tRaVttmGWN1Ijqy9ypprB tX6GUXl2IZm0zndiGKOBn/SkiMs+f4agVRLrpHhtmHEVIGsQBg1w8/yjCPBZQS1jPXHj wkuUDPafPPU+5fuY+OaSSLQI0Pe6X25pM7f2N914dJr/P9zoME2S887aJueYqBZa6ofW 3sQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature:arc-authentication-results; bh=e2Epp2iARyCkMRhGHocRaFf8mYUhltDVe/o7ukuUxBw=; b=jNGplbPACDxY3uaZmZQOY43ToEQGFqMJHf2JXWnZ05XAaftGksMU0ihEoHgXiE87ZE Os4bUj/wRf2pLWzM+EIathSGpphgbITDQqrq4GGO8LdpX4JfQlG/r+q/zD+ILth5sYuY YhCDGCC7lCVSfwvPSSh0ZjGiYwZtb1aFRR/UXF2F1a3yoa8GgReDm5QXntK4SBoUm793 oIl1WBC877QPO3kdlIbHfpXYoRUoGdcrFXdjdQkrN8+MsVoKdqRNeKeJ94Jowhka2ZSv gVQtc5VQ2uaGIAqBAyhcOwaCBKyP5YDmDAEn6o7dcdDzduZQl3LmlZ1fFWQ47Jnj/GE1 vuFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=te/4QAvk; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id c54si1657693edb.86.2017.09.21.07.39.58; Thu, 21 Sep 2017 07:39:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=te/4QAvk; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: by lists.denx.de (Postfix, from userid 105) id 7675DC2200C; Thu, 21 Sep 2017 14:33:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 94E7DC21FED; Thu, 21 Sep 2017 14:31:33 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B83B5C21E26; Thu, 21 Sep 2017 14:31:01 +0000 (UTC) Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by lists.denx.de (Postfix) with ESMTPS id 686DBC21F29 for ; Thu, 21 Sep 2017 14:30:55 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8LEUrJ8002906; Thu, 21 Sep 2017 09:30:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1506004253; bh=K/1ytV+kbJP91flCpWSRiJro8WE1E6mPMBoZPTHK2f4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=te/4QAvkZc9WkraHCNbPtZjScir+lDiz3ri/Z9xQ1KRsq1q22rA7tTO5yl2NPEo7B +7zL6iyqvmHIQTaIeIdfXGu0onNqjgOAPEh6+h1HP/VICrgdLd4ZMvpJt8hC4Br3a3 3ll8rtDldWFRD4iJZBi+KrLb2Jqc8AWdBfLEttoU= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEUrKj019948; Thu, 21 Sep 2017 09:30:53 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 21 Sep 2017 09:30:53 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 21 Sep 2017 09:30:53 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEUpGV016484; Thu, 21 Sep 2017 09:30:52 -0500 From: Jean-Jacques Hiblot To: , , , Date: Thu, 21 Sep 2017 16:30:03 +0200 Message-ID: <1506004213-22620-17-git-send-email-jjhiblot@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506004213-22620-1-git-send-email-jjhiblot@ti.com> References: <1506004213-22620-1-git-send-email-jjhiblot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 16/26] mmc: add a new mmc parameter to disable mmc clock X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Kishon Vijay Abraham I mmc clock has to be disabled in certain cases like during the voltage switch sequence. Modify mmc_set_clock function to take disable as an argument that signifies if the clock has to be enabled or disabled. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Jean-Jacques Hiblot --- drivers/mmc/fsl_esdhc.c | 2 +- drivers/mmc/mmc.c | 11 ++++++----- include/mmc.h | 12 +++++++++++- 3 files changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index cc188c4..6b52c6a 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -665,7 +665,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) #endif /* Set the initial clock speed */ - mmc_set_clock(mmc, 400000); + mmc_set_clock(mmc, 400000, false); /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 65a3d8e..1c941a2 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1214,7 +1214,7 @@ static int mmc_set_ios(struct mmc *mmc) } #endif -int mmc_set_clock(struct mmc *mmc, uint clock) +int mmc_set_clock(struct mmc *mmc, uint clock, bool disable) { if (clock > mmc->cfg->f_max) clock = mmc->cfg->f_max; @@ -1223,6 +1223,7 @@ int mmc_set_clock(struct mmc *mmc, uint clock) clock = mmc->cfg->f_min; mmc->clock = clock; + mmc->clk_disable = disable; return mmc_set_ios(mmc); } @@ -1322,7 +1323,7 @@ static int sd_select_mode_and_width(struct mmc *mmc) /* configure the bus mode (host) */ mmc_select_mode(mmc, mwt->mode); - mmc_set_clock(mmc, mmc->tran_speed); + mmc_set_clock(mmc, mmc->tran_speed, false); err = sd_read_ssr(mmc); if (!err) @@ -1333,7 +1334,7 @@ static int sd_select_mode_and_width(struct mmc *mmc) error: /* revert to a safer bus speed */ mmc_select_mode(mmc, SD_LEGACY); - mmc_set_clock(mmc, mmc->tran_speed); + mmc_set_clock(mmc, mmc->tran_speed, false); } } } @@ -1476,7 +1477,7 @@ static int mmc_select_mode_and_width(struct mmc *mmc) /* configure the bus mode (host) */ mmc_select_mode(mmc, mwt->mode); - mmc_set_clock(mmc, mmc->tran_speed); + mmc_set_clock(mmc, mmc->tran_speed, false); /* do a transfer to check the configuration */ err = mmc_read_and_compare_ext_csd(mmc); @@ -1950,7 +1951,7 @@ static void mmc_set_initial_state(struct mmc *mmc) mmc_select_mode(mmc, MMC_LEGACY); mmc_set_bus_width(mmc, 1); - mmc_set_clock(mmc, 0); + mmc_set_clock(mmc, 0, false); } static int mmc_power_on(struct mmc *mmc) diff --git a/include/mmc.h b/include/mmc.h index bd096ae..8d6e0f8 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -472,6 +472,7 @@ struct mmc { void *priv; uint has_init; int high_capacity; + bool clk_disable; /* true if the clock can be turned off */ uint bus_width; uint clock; enum mmc_voltage signal_voltage; @@ -567,7 +568,16 @@ int mmc_unbind(struct udevice *dev); int mmc_initialize(bd_t *bis); int mmc_init(struct mmc *mmc); int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); -int mmc_set_clock(struct mmc *mmc, uint clock); + +/** + * mmc_set_clock() - change the bus clock + * @mmc: MMC struct + * @clock: bus frequency in Hz + * @disable: flag indicating if the clock must on or off + * @return 0 if OK, -ve on error + */ +int mmc_set_clock(struct mmc *mmc, uint clock, bool disable); + struct mmc *find_mmc_device(int dev_num); int mmc_set_dev(int dev_num); void print_mmc_devices(char separator);