diff mbox series

[16/16] mips: mtmips: add support for mt7628-rfb

Message ID 1578452563-7227-1-git-send-email-weijie.gao@mediatek.com
State New
Headers show
Series [01/16] configs: mtmips: add missing board selection for gardena-smart-gateway-mt7688 | expand

Commit Message

Weijie Gao Jan. 8, 2020, 3:02 a.m. UTC
This patch adds support for mt7628 reference board

Signed-off-by: Weijie Gao <weijie.gao at mediatek.com>
---
 arch/mips/dts/Makefile                        |   1 +
 arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi |  24 +++++
 arch/mips/dts/mediatek,mt7628-rfb.dts         |  67 ++++++++++++
 arch/mips/mach-mtmips/Kconfig                 |   9 ++
 board/mediatek/mt7628/Kconfig                 |  12 +++
 board/mediatek/mt7628/MAINTAINERS             |   8 ++
 board/mediatek/mt7628/Makefile                |   4 +
 board/mediatek/mt7628/board.c                 |  25 +++++
 board/mediatek/mt7628/spl_load.c              | 102 ++++++++++++++++++
 configs/mt7628_rfb_defconfig                  |  47 ++++++++
 include/configs/mt7628.h                      |  57 ++++++++++
 11 files changed, 356 insertions(+)
 create mode 100644 arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
 create mode 100644 arch/mips/dts/mediatek,mt7628-rfb.dts
 create mode 100644 board/mediatek/mt7628/Kconfig
 create mode 100644 board/mediatek/mt7628/MAINTAINERS
 create mode 100644 board/mediatek/mt7628/Makefile
 create mode 100644 board/mediatek/mt7628/board.c
 create mode 100644 board/mediatek/mt7628/spl_load.c
 create mode 100644 configs/mt7628_rfb_defconfig
 create mode 100644 include/configs/mt7628.h

Comments

Stefan Roese Jan. 10, 2020, 2:34 p.m. UTC | #1
On 08.01.20 04:02, Weijie Gao wrote:
> This patch adds support for mt7628 reference board
> 
> Signed-off-by: Weijie Gao <weijie.gao at mediatek.com>
> ---
>   arch/mips/dts/Makefile                        |   1 +
>   arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi |  24 +++++
>   arch/mips/dts/mediatek,mt7628-rfb.dts         |  67 ++++++++++++
>   arch/mips/mach-mtmips/Kconfig                 |   9 ++
>   board/mediatek/mt7628/Kconfig                 |  12 +++
>   board/mediatek/mt7628/MAINTAINERS             |   8 ++
>   board/mediatek/mt7628/Makefile                |   4 +
>   board/mediatek/mt7628/board.c                 |  25 +++++
>   board/mediatek/mt7628/spl_load.c              | 102 ++++++++++++++++++
>   configs/mt7628_rfb_defconfig                  |  47 ++++++++
>   include/configs/mt7628.h                      |  57 ++++++++++
>   11 files changed, 356 insertions(+)
>   create mode 100644 arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
>   create mode 100644 arch/mips/dts/mediatek,mt7628-rfb.dts
>   create mode 100644 board/mediatek/mt7628/Kconfig
>   create mode 100644 board/mediatek/mt7628/MAINTAINERS
>   create mode 100644 board/mediatek/mt7628/Makefile
>   create mode 100644 board/mediatek/mt7628/board.c
>   create mode 100644 board/mediatek/mt7628/spl_load.c
>   create mode 100644 configs/mt7628_rfb_defconfig
>   create mode 100644 include/configs/mt7628.h
> 
> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
> index c9d75596f2..cbd0c8bc8b 100644
> --- a/arch/mips/dts/Makefile
> +++ b/arch/mips/dts/Makefile
> @@ -17,6 +17,7 @@ dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb
>   dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
>   dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
>   dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
> +dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
>   dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
>   dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
>   dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
> diff --git a/arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi b/arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
> new file mode 100644
> index 0000000000..213959105f
> --- /dev/null
> +++ b/arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
> @@ -0,0 +1,24 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 MediaTek Inc.
> + *
> + * Author: Weijie Gao <weijie.gao at mediatek.com>
> + */
> +
> +/ {
> +	binman {
> +		filename = "u-boot-mtmips.bin";
> +		pad-byte = <0xff>;
> +
> +#ifdef CONFIG_SPL
> +		u-boot-spl {
> +		};
> +
> +		u-boot-lzma-img {
> +		};
> +#else
> +		u-boot {
> +		};
> +#endif
> +	};
> +};
> diff --git a/arch/mips/dts/mediatek,mt7628-rfb.dts b/arch/mips/dts/mediatek,mt7628-rfb.dts
> new file mode 100644
> index 0000000000..a0cca4f5ba
> --- /dev/null
> +++ b/arch/mips/dts/mediatek,mt7628-rfb.dts
> @@ -0,0 +1,67 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 MediaTek Inc.
> + *
> + * Author: Weijie Gao <weijie.gao at mediatek.com>
> + */
> +
> +/dts-v1/;
> +
> +#include "mt7628.dtsi"
> +
> +/ {
> +	compatible = "mediatek,mt7628-rfb", "ralink,mt7628a-soc";
> +	model = "MediaTek MT7628 RFB";
> +
> +	aliases {
> +		serial0 = &uart0;
> +		spi0 = &spi0;
> +	};
> +
> +	chosen {
> +		stdout-path = &uart0;
> +	};
> +};
> +
> +&pinctrl {
> +	state_default: pin_state {
> +		pleds {
> +			groups = "p0led", "p1led", "p2led", "p3led", "p4led";
> +			function = "led";
> +		};
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +	num-cs = <2>;
> +
> +	spi-flash at 0 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		compatible = "jedec,spi-nor";
> +		spi-max-frequency = <25000000>;
> +		reg = <0>;
> +	};
> +};
> +
> +&eth {
> +	mediatek,wan-port = <0>;
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&ephy_router_mode>;
> +};
> +
> +&mmc {
> +	bus-width = <4>;
> +	cap-sd-highspeed;
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&sd_router_mode>;
> +
> +	status = "okay";
> +};
> diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
> index 7c674ecb2b..a9fec619b9 100644
> --- a/arch/mips/mach-mtmips/Kconfig
> +++ b/arch/mips/mach-mtmips/Kconfig
> @@ -47,6 +47,14 @@ endchoice
>   choice
>   	prompt "Board select"
>   
> +config BOARD_MT7628_RFB
> +	bool "MediaTek MT7628 RFB"
> +	depends on SOC_MT7628
> +	help
> +	  The reference design of MT7628. The board has 128 MiB DDR2, 8 MiB
> +	  SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host,
> +	  1 SDXC, 1 PCIe socket and JTAG pins.
> +
>   config BOARD_GARDENA_SMART_GATEWAY_MT7688
>   	bool "GARDENA smart Gateway"
>   	depends on SOC_MT7628
> @@ -69,5 +77,6 @@ endchoice
>   
>   source "board/gardena/smart-gateway-mt7688/Kconfig"
>   source "board/seeed/linkit-smart-7688/Kconfig"
> +source "board/mediatek/mt7628/Kconfig"

Please keep the list alphabetically sorted.

>   
>   endmenu
> diff --git a/board/mediatek/mt7628/Kconfig b/board/mediatek/mt7628/Kconfig
> new file mode 100644
> index 0000000000..d6b6f9d632
> --- /dev/null
> +++ b/board/mediatek/mt7628/Kconfig
> @@ -0,0 +1,12 @@
> +if BOARD_MT7628_RFB
> +
> +config SYS_BOARD
> +	default "mt7628"
> +
> +config SYS_VENDOR
> +	default "mediatek"
> +
> +config SYS_CONFIG_NAME
> +	default "mt7628"
> +
> +endif
> diff --git a/board/mediatek/mt7628/MAINTAINERS b/board/mediatek/mt7628/MAINTAINERS
> new file mode 100644
> index 0000000000..e690a3e934
> --- /dev/null
> +++ b/board/mediatek/mt7628/MAINTAINERS
> @@ -0,0 +1,8 @@
> +MT7628_RFB BOARD
> +M:	Weijie Gao <weijie.gao at mediatek.com>
> +S:	Maintained
> +F:	board/mediatek/mt7628
> +F:	include/configs/mt7628.h
> +F:	configs/mt7628_rfb_defconfig
> +F:	arch/mips/dts/mediatek,mt7628-rfb.dts
> +F:	arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
> diff --git a/board/mediatek/mt7628/Makefile b/board/mediatek/mt7628/Makefile
> new file mode 100644
> index 0000000000..9e3aa19ac3
> --- /dev/null
> +++ b/board/mediatek/mt7628/Makefile
> @@ -0,0 +1,4 @@
> +# SPDX-License-Identifier: GPL-2.0
> +
> +obj-y += board.o
> +obj-$(CONFIG_SPL_BUILD) += spl_load.o
> diff --git a/board/mediatek/mt7628/board.c b/board/mediatek/mt7628/board.c
> new file mode 100644
> index 0000000000..643caf5d3f
> --- /dev/null
> +++ b/board/mediatek/mt7628/board.c
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
> + *
> + * Author: Weijie Gao <weijie.gao at mediatek.com>
> + */
> +
> +#include <common.h>
> +#include <linux/sizes.h>
> +#include <asm/io.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +void spl_board_init(void)
> +{
> +	/*
> +	 * The original locked cache for initial stack is very small and can't
> +	 * hold large malloc buffer.
> +	 * But lzma decompression needs a buffer > 64KiB. So we have to
> +	 * relocate the malloc region here before decompression.
> +	 */
> +	gd->malloc_base = CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET;
> +	gd->malloc_limit = SZ_512K;
> +	gd->malloc_ptr = 0;
> +}

Perhaps it makes sense to move this code into a MT7628 common location,
so that I can be reused by other boards as well.

> diff --git a/board/mediatek/mt7628/spl_load.c b/board/mediatek/mt7628/spl_load.c
> new file mode 100644
> index 0000000000..0e4ec2675e
> --- /dev/null
> +++ b/board/mediatek/mt7628/spl_load.c
> @@ -0,0 +1,102 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
> + *
> + * Author: Weijie Gao <weijie.gao at mediatek.com>
> + */
> +
> +#include <common.h>
> +#include <cpu_func.h>
> +#include <asm/sections.h>
> +#include <linux/sizes.h>
> +#include <lzma/LzmaTypes.h>
> +#include <lzma/LzmaDec.h>
> +#include <lzma/LzmaTools.h>
> +#include <spl.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#ifndef CONFIG_SYS_BOOTM_LEN
> +/* use 8MiB as default max uncompress size */
> +#define CONFIG_SYS_BOOTM_LEN		SZ_8M
> +#endif
> +
> +static int spl_try_load_image(struct spl_image_info *spl_image,
> +			      void *image_addr)
> +{
> +	int ret;
> +	uintptr_t dataptr;
> +	struct image_header hdr;
> +	SizeT lzma_len;
> +
> +	memcpy(&hdr, (const void *)image_addr, sizeof(hdr));
> +
> +	ret = spl_parse_image_header(spl_image, &hdr);
> +
> +	if (ret)
> +		return ret;
> +
> +	if (!spl_image->entry_point)
> +		spl_image->entry_point = spl_image->load_addr;
> +
> +	dataptr = image_addr + sizeof(hdr);
> +
> +	if (hdr.ih_comp == IH_COMP_NONE) {
> +		/*
> +		 * Load real U-Boot from its location to its
> +		 * defined location in SDRAM
> +		 */
> +
> +		if (spl_image->load_addr != dataptr) {
> +			memmove((void *)spl_image->load_addr, (void *)dataptr,
> +				spl_image->size);
> +		}
> +	}
> +#ifdef CONFIG_SPL_LZMA
> +	else if (hdr.ih_comp == IH_COMP_LZMA) {
> +		/*
> +		 * Uncompress real U-Boot to its defined location in SDRAM
> +		 */
> +		lzma_len = CONFIG_SYS_BOOTM_LEN;
> +
> +		ret = lzmaBuffToBuffDecompress((u8 *)spl_image->load_addr,
> +					       &lzma_len, (u8 *)dataptr,
> +					       spl_image->size);
> +
> +		if (ret) {
> +			printf("Error: LZMA uncompression error: %d\n", ret);
> +			return ret;
> +		}
> +
> +		spl_image->size = lzma_len;
> +	}
> +#endif /* CONFIG_SPL_LZMA */
> +	else {
> +		debug("Warning: Unsupported compression method found in image "
> +		      "header at offset 0x%p\n", image_addr);
> +		return -EINVAL;
> +	}
> +
> +	flush_cache((unsigned long)spl_image->load_addr, spl_image->size);
> +
> +	return 0;
> +}
> +
> +static int spl_mtk_nor_load_image(struct spl_image_info *spl_image,
> +				  struct spl_boot_device *bootdev)
> +{
> +	ulong search_start = (ulong)__image_copy_end;
> +
> +	/*
> +	 * Loading of the payload to SDRAM is done with skipping of
> +	 * the mkimage header
> +	 */
> +	spl_image->flags |= SPL_COPY_PAYLOAD_ONLY;
> +
> +	/* Try to boot without padding */
> +	if (!spl_try_load_image(spl_image, (void *)search_start))
> +		return 0;
> +
> +	return -EINVAL;
> +}
> +SPL_LOAD_IMAGE_METHOD("NOR", 0, BOOT_DEVICE_NOR, spl_mtk_nor_load_image);

Again, lets move this code into a common location for reuse of the
other MT76x8 boards.

> diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig
> new file mode 100644
> index 0000000000..94e26db4c6
> --- /dev/null
> +++ b/configs/mt7628_rfb_defconfig
> @@ -0,0 +1,47 @@
> +CONFIG_MIPS=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_SPL_SERIAL_SUPPORT=y
> +CONFIG_ENV_SIZE=0x1000
> +CONFIG_ENV_OFFSET=0x30000
> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x100
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_SPL=y
> +CONFIG_ENV_SECT_SIZE=0x10000
> +CONFIG_ARCH_MTMIPS=y
> +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
> +CONFIG_MIPS_BOOT_FDT=y
> +CONFIG_FIT=y
> +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
> +CONFIG_USE_BOOTCOMMAND=y
> +CONFIG_BOOTCOMMAND="bootm 0x9c050000"
> +CONFIG_SYS_CONSOLE_INFO_QUIET=y
> +CONFIG_SPL_BOARD_INIT=y
> +CONFIG_SPL_SYS_MALLOC_SIMPLE=y
> +# CONFIG_CMD_ELF is not set
> +# CONFIG_CMD_XIMG is not set
> +# CONFIG_CMD_CRC32 is not set
> +# CONFIG_CMD_DM is not set
> +CONFIG_CMD_GPIO=y
> +# CONFIG_CMD_LOADS is not set
> +CONFIG_CMD_SPI=y
> +# CONFIG_CMD_NFS is not set
> +# CONFIG_PARTITIONS is not set
> +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb"
> +CONFIG_ENV_IS_IN_SPI_FLASH=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +# CONFIG_INPUT is not set
> +CONFIG_SPI_FLASH_EON=y
> +CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_ISSI=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_SPI_FLASH_XMC=y
> +CONFIG_MT7628_ETH=y
> +CONFIG_SPI=y
> +CONFIG_MT7621_SPI=y
> +CONFIG_LZMA=y
> +CONFIG_SPL_LZMA=y
> diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h
> new file mode 100644
> index 0000000000..4467dace62
> --- /dev/null
> +++ b/include/configs/mt7628.h
> @@ -0,0 +1,57 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2020 MediaTek Inc.
> + *
> + * Author: Weijie Gao <weijie.gao at mediatek.com>
> + */
> +
> +#ifndef __CONFIG_MT7628_H
> +#define __CONFIG_MT7628_H
> +
> +#define CONFIG_SYS_HZ			1000
> +#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
> +
> +#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
> +
> +#define CONFIG_SYS_MALLOC_LEN		0x100000
> +#define CONFIG_SYS_BOOTPARAMS_LEN	0x20000
> +
> +#define CONFIG_SYS_SDRAM_BASE		0x80000000
> +#define CONFIG_SYS_LOAD_ADDR		0x80010000
> +
> +#define CONFIG_SYS_INIT_SP_OFFSET	0x80000
> +
> +#define CONFIG_SYS_BOOTM_LEN		0x1000000
> +
> +#define CONFIG_SYS_MAXARGS		16
> +#define CONFIG_SYS_CBSIZE		1024
> +
> +/* Network */
> +#define CONFIG_IPADDR			192.168.1.1
> +#define CONFIG_SERVERIP			192.168.1.2
> +#define CONFIG_NETMASK			255.255.255.0

Usually its frowned upon adding such IP pre-sets to the config header.

> +
> +/* Serial SPL */
> +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)
> +#define CONFIG_SYS_NS16550_MEM32
> +#define CONFIG_SYS_NS16550_CLK		40000000
> +#define CONFIG_SYS_NS16550_REG_SIZE	-4
> +#define CONFIG_SYS_NS16550_COM1		0xb0000c00
> +#define CONFIG_CONS_INDEX		1
> +#endif
> +
> +/* Serial common */
> +#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
> +					  230400, 460800, 921600 }
> +
> +/* SPL */
> +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#endif
> +
> +#define CONFIG_SYS_UBOOT_START		CONFIG_SYS_TEXT_BASE
> +#define CONFIG_SPL_BSS_START_ADDR	0x80010000
> +#define CONFIG_SPL_BSS_MAX_SIZE		0x10000
> +#define CONFIG_SPL_MAX_SIZE		0x8000
> +
> +#endif /* __CONFIG_MT7628_H */

Thanks,
Stefan
diff mbox series

Patch

diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index c9d75596f2..cbd0c8bc8b 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -17,6 +17,7 @@  dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb
 dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
 dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
 dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
+dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
 dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
 dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
 dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
diff --git a/arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi b/arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
new file mode 100644
index 0000000000..213959105f
--- /dev/null
+++ b/arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
@@ -0,0 +1,24 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie.gao at mediatek.com>
+ */
+
+/ {
+	binman {
+		filename = "u-boot-mtmips.bin";
+		pad-byte = <0xff>;
+
+#ifdef CONFIG_SPL
+		u-boot-spl {
+		};
+
+		u-boot-lzma-img {
+		};
+#else
+		u-boot {
+		};
+#endif
+	};
+};
diff --git a/arch/mips/dts/mediatek,mt7628-rfb.dts b/arch/mips/dts/mediatek,mt7628-rfb.dts
new file mode 100644
index 0000000000..a0cca4f5ba
--- /dev/null
+++ b/arch/mips/dts/mediatek,mt7628-rfb.dts
@@ -0,0 +1,67 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie.gao at mediatek.com>
+ */
+
+/dts-v1/;
+
+#include "mt7628.dtsi"
+
+/ {
+	compatible = "mediatek,mt7628-rfb", "ralink,mt7628a-soc";
+	model = "MediaTek MT7628 RFB";
+
+	aliases {
+		serial0 = &uart0;
+		spi0 = &spi0;
+	};
+
+	chosen {
+		stdout-path = &uart0;
+	};
+};
+
+&pinctrl {
+	state_default: pin_state {
+		pleds {
+			groups = "p0led", "p1led", "p2led", "p3led", "p4led";
+			function = "led";
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+	num-cs = <2>;
+
+	spi-flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <25000000>;
+		reg = <0>;
+	};
+};
+
+&eth {
+	mediatek,wan-port = <0>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&ephy_router_mode>;
+};
+
+&mmc {
+	bus-width = <4>;
+	cap-sd-highspeed;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd_router_mode>;
+
+	status = "okay";
+};
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index 7c674ecb2b..a9fec619b9 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -47,6 +47,14 @@  endchoice
 choice
 	prompt "Board select"
 
+config BOARD_MT7628_RFB
+	bool "MediaTek MT7628 RFB"
+	depends on SOC_MT7628
+	help
+	  The reference design of MT7628. The board has 128 MiB DDR2, 8 MiB
+	  SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host,
+	  1 SDXC, 1 PCIe socket and JTAG pins.
+
 config BOARD_GARDENA_SMART_GATEWAY_MT7688
 	bool "GARDENA smart Gateway"
 	depends on SOC_MT7628
@@ -69,5 +77,6 @@  endchoice
 
 source "board/gardena/smart-gateway-mt7688/Kconfig"
 source "board/seeed/linkit-smart-7688/Kconfig"
+source "board/mediatek/mt7628/Kconfig"
 
 endmenu
diff --git a/board/mediatek/mt7628/Kconfig b/board/mediatek/mt7628/Kconfig
new file mode 100644
index 0000000000..d6b6f9d632
--- /dev/null
+++ b/board/mediatek/mt7628/Kconfig
@@ -0,0 +1,12 @@ 
+if BOARD_MT7628_RFB
+
+config SYS_BOARD
+	default "mt7628"
+
+config SYS_VENDOR
+	default "mediatek"
+
+config SYS_CONFIG_NAME
+	default "mt7628"
+
+endif
diff --git a/board/mediatek/mt7628/MAINTAINERS b/board/mediatek/mt7628/MAINTAINERS
new file mode 100644
index 0000000000..e690a3e934
--- /dev/null
+++ b/board/mediatek/mt7628/MAINTAINERS
@@ -0,0 +1,8 @@ 
+MT7628_RFB BOARD
+M:	Weijie Gao <weijie.gao at mediatek.com>
+S:	Maintained
+F:	board/mediatek/mt7628
+F:	include/configs/mt7628.h
+F:	configs/mt7628_rfb_defconfig
+F:	arch/mips/dts/mediatek,mt7628-rfb.dts
+F:	arch/mips/dts/mediatek,mt7628-rfb-u-boot.dtsi
diff --git a/board/mediatek/mt7628/Makefile b/board/mediatek/mt7628/Makefile
new file mode 100644
index 0000000000..9e3aa19ac3
--- /dev/null
+++ b/board/mediatek/mt7628/Makefile
@@ -0,0 +1,4 @@ 
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += board.o
+obj-$(CONFIG_SPL_BUILD) += spl_load.o
diff --git a/board/mediatek/mt7628/board.c b/board/mediatek/mt7628/board.c
new file mode 100644
index 0000000000..643caf5d3f
--- /dev/null
+++ b/board/mediatek/mt7628/board.c
@@ -0,0 +1,25 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
+ *
+ * Author: Weijie Gao <weijie.gao at mediatek.com>
+ */
+
+#include <common.h>
+#include <linux/sizes.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void spl_board_init(void)
+{
+	/*
+	 * The original locked cache for initial stack is very small and can't
+	 * hold large malloc buffer.
+	 * But lzma decompression needs a buffer > 64KiB. So we have to
+	 * relocate the malloc region here before decompression.
+	 */
+	gd->malloc_base = CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET;
+	gd->malloc_limit = SZ_512K;
+	gd->malloc_ptr = 0;
+}
diff --git a/board/mediatek/mt7628/spl_load.c b/board/mediatek/mt7628/spl_load.c
new file mode 100644
index 0000000000..0e4ec2675e
--- /dev/null
+++ b/board/mediatek/mt7628/spl_load.c
@@ -0,0 +1,102 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
+ *
+ * Author: Weijie Gao <weijie.gao at mediatek.com>
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <asm/sections.h>
+#include <linux/sizes.h>
+#include <lzma/LzmaTypes.h>
+#include <lzma/LzmaDec.h>
+#include <lzma/LzmaTools.h>
+#include <spl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef CONFIG_SYS_BOOTM_LEN
+/* use 8MiB as default max uncompress size */
+#define CONFIG_SYS_BOOTM_LEN		SZ_8M
+#endif
+
+static int spl_try_load_image(struct spl_image_info *spl_image,
+			      void *image_addr)
+{
+	int ret;
+	uintptr_t dataptr;
+	struct image_header hdr;
+	SizeT lzma_len;
+
+	memcpy(&hdr, (const void *)image_addr, sizeof(hdr));
+
+	ret = spl_parse_image_header(spl_image, &hdr);
+
+	if (ret)
+		return ret;
+
+	if (!spl_image->entry_point)
+		spl_image->entry_point = spl_image->load_addr;
+
+	dataptr = image_addr + sizeof(hdr);
+
+	if (hdr.ih_comp == IH_COMP_NONE) {
+		/*
+		 * Load real U-Boot from its location to its
+		 * defined location in SDRAM
+		 */
+
+		if (spl_image->load_addr != dataptr) {
+			memmove((void *)spl_image->load_addr, (void *)dataptr,
+				spl_image->size);
+		}
+	}
+#ifdef CONFIG_SPL_LZMA
+	else if (hdr.ih_comp == IH_COMP_LZMA) {
+		/*
+		 * Uncompress real U-Boot to its defined location in SDRAM
+		 */
+		lzma_len = CONFIG_SYS_BOOTM_LEN;
+
+		ret = lzmaBuffToBuffDecompress((u8 *)spl_image->load_addr,
+					       &lzma_len, (u8 *)dataptr,
+					       spl_image->size);
+
+		if (ret) {
+			printf("Error: LZMA uncompression error: %d\n", ret);
+			return ret;
+		}
+
+		spl_image->size = lzma_len;
+	}
+#endif /* CONFIG_SPL_LZMA */
+	else {
+		debug("Warning: Unsupported compression method found in image "
+		      "header at offset 0x%p\n", image_addr);
+		return -EINVAL;
+	}
+
+	flush_cache((unsigned long)spl_image->load_addr, spl_image->size);
+
+	return 0;
+}
+
+static int spl_mtk_nor_load_image(struct spl_image_info *spl_image,
+				  struct spl_boot_device *bootdev)
+{
+	ulong search_start = (ulong)__image_copy_end;
+
+	/*
+	 * Loading of the payload to SDRAM is done with skipping of
+	 * the mkimage header
+	 */
+	spl_image->flags |= SPL_COPY_PAYLOAD_ONLY;
+
+	/* Try to boot without padding */
+	if (!spl_try_load_image(spl_image, (void *)search_start))
+		return 0;
+
+	return -EINVAL;
+}
+SPL_LOAD_IMAGE_METHOD("NOR", 0, BOOT_DEVICE_NOR, spl_mtk_nor_load_image);
diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig
new file mode 100644
index 0000000000..94e26db4c6
--- /dev/null
+++ b/configs/mt7628_rfb_defconfig
@@ -0,0 +1,47 @@ 
+CONFIG_MIPS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x30000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x100
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_ARCH_MTMIPS=y
+CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_FIT=y
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="bootm 0x9c050000"
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_DM is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_NFS is not set
+# CONFIG_PARTITIONS is not set
+CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+# CONFIG_INPUT is not set
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_MT7628_ETH=y
+CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
+CONFIG_LZMA=y
+CONFIG_SPL_LZMA=y
diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h
new file mode 100644
index 0000000000..4467dace62
--- /dev/null
+++ b/include/configs/mt7628.h
@@ -0,0 +1,57 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 MediaTek Inc.
+ *
+ * Author: Weijie Gao <weijie.gao at mediatek.com>
+ */
+
+#ifndef __CONFIG_MT7628_H
+#define __CONFIG_MT7628_H
+
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
+
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_MALLOC_LEN		0x100000
+#define CONFIG_SYS_BOOTPARAMS_LEN	0x20000
+
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define CONFIG_SYS_LOAD_ADDR		0x80010000
+
+#define CONFIG_SYS_INIT_SP_OFFSET	0x80000
+
+#define CONFIG_SYS_BOOTM_LEN		0x1000000
+
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_CBSIZE		1024
+
+/* Network */
+#define CONFIG_IPADDR			192.168.1.1
+#define CONFIG_SERVERIP			192.168.1.2
+#define CONFIG_NETMASK			255.255.255.0
+
+/* Serial SPL */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SYS_NS16550_CLK		40000000
+#define CONFIG_SYS_NS16550_REG_SIZE	-4
+#define CONFIG_SYS_NS16550_COM1		0xb0000c00
+#define CONFIG_CONS_INDEX		1
+#endif
+
+/* Serial common */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
+					  230400, 460800, 921600 }
+
+/* SPL */
+#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#define CONFIG_SYS_UBOOT_START		CONFIG_SYS_TEXT_BASE
+#define CONFIG_SPL_BSS_START_ADDR	0x80010000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x10000
+#define CONFIG_SPL_MAX_SIZE		0x8000
+
+#endif /* __CONFIG_MT7628_H */