From patchwork Tue Feb 18 16:13:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sagar Shrikant Kadam X-Patchwork-Id: 236513 List-Id: U-Boot discussion From: sagar.kadam at sifive.com (Sagar Shrikant Kadam) Date: Tue, 18 Feb 2020 08:13:24 -0800 Subject: [PATCH v1 2/2] cpu: clk: riscv: populate proper CPU core clk frequency In-Reply-To: <1582042404-27356-1-git-send-email-sagar.kadam@sifive.com> References: <1582042404-27356-1-git-send-email-sagar.kadam@sifive.com> Message-ID: <1582042404-27356-3-git-send-email-sagar.kadam@sifive.com> Fetch core clock frequency from prci if clock-frequency for CPU nodes is missing in device tree, so that the cmd "#cpu detail" will show the correct CPU frequency. U-Boot command "#cpu detail" is showing wrong frequency values. This patch fixes this issue by getting the core clock set in prci driver if clock-frequency is not added to CPU nodes in device tree. It is tested on HiFive Unleashed A00 board. Signed-off-by: Sagar Shrikant Kadam Tested-by: Vincent Chen --- drivers/cpu/riscv_cpu.c | 39 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c index 28ad0aa..eb5491f 100644 --- a/drivers/cpu/riscv_cpu.c +++ b/drivers/cpu/riscv_cpu.c @@ -9,6 +9,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -25,11 +27,46 @@ static int riscv_cpu_get_desc(struct udevice *dev, char *buf, int size) return 0; } +static ulong riscv_get_clkrate(int clk_index) +{ + int ret; + struct udevice *dev; + struct clk clk; + ulong rate; + + ret = uclass_get_device_by_driver(UCLASS_CLK, + DM_GET_DRIVER(sifive_fu540_prci), + &dev); + if (ret < 0) { + pr_err("%s: Could not get device driver\n", __func__); + return ret; + } + + clk.id = clk_index; + ret = clk_request(dev, &clk); + if (ret < 0) { + pr_err("%s: request to clock device failed...\n", __func__); + return ret; + } + + rate = clk_get_rate(&clk); + + clk_free(&clk); + + return rate; +} + static int riscv_cpu_get_info(struct udevice *dev, struct cpu_info *info) { const char *mmu; + int ret; - dev_read_u32(dev, "clock-frequency", (u32 *)&info->cpu_freq); + ret = dev_read_u32(dev, "clock-frequency", (u32 *)&info->cpu_freq); + if (ret) { + /* if clock-frequency is missing in DT, read it from prci */ + debug("Fetch core clk configured by prci\n"); + info->cpu_freq = riscv_get_clkrate(PRCI_CLK_COREPLL); + } mmu = dev_read_string(dev, "mmu-type"); if (!mmu)