@@ -82,6 +82,14 @@
status = "okay";
};
+&xhci {
+ status = "okay";
+};
+
+&u3phy {
+ status = "okay";
+};
+
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
@@ -11,6 +11,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/mt7629-power.h>
#include <dt-bindings/reset/mt7629-reset.h>
+#include <dt-bindings/phy/phy.h>
#include "skeleton.dtsi"
/ {
@@ -222,6 +223,46 @@
#size-cells = <0>;
};
+ ssusbsys: ssusbsys at 1a000000 {
+ compatible = "mediatek,mt7629-ssusbsys", "syscon";
+ reg = <0x1a000000 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ xhci: usb at 1a0c0000 {
+ compatible = "mediatek,mt7629-xhci", "mediatek,mtk-xhci";
+ reg = <0x1a0c0000 0x1000>, <0x1a0c3e00 0x0100>;
+ reg-names = "mac", "ippc";
+ power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>;
+ clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, <&ssusbsys CLK_SSUSB_REF_EN>,
+ <&ssusbsys CLK_SSUSB_MCU_EN>, <&ssusbsys CLK_SSUSB_DMA_EN>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
+ status = "disabled";
+ };
+
+ u3phy: usb-phy at 1a0c4000 {
+ compatible = "mediatek,mt7629-tphy", "mediatek,generic-tphy-v2";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1a0c4000 0x1000>;
+ status = "disabled";
+
+ u2port0: usb-phy at 0 {
+ reg = <0x0 0x0700>;
+ #phy-cells = <1>;
+ clocks = <&ssusbsys CLK_SSUSB_U2_PHY_EN>, <&clk20m>;
+ clock-names = "ref", "da_ref";
+ };
+
+ u3port0: usb-phy at 700 {
+ reg = <0x0700 0x0700>;
+ #phy-cells = <1>;
+ clocks = <&clk20m>, <&clk20m>;
+ clock-names = "ref", "da_ref";
+ };
+ };
+
ethsys: syscon at 1b000000 {
compatible = "mediatek,mt7629-ethsys", "syscon";
reg = <0x1b000000 0x1000>;
Add usb, phy and clock nodes Signed-off-by: Chunfeng Yun <chunfeng.yun at mediatek.com> --- arch/arm/dts/mt7629-rfb.dts | 8 ++++++++ arch/arm/dts/mt7629.dtsi | 41 +++++++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+)