From patchwork Thu Apr 16 15:09:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 237836 List-Id: U-Boot discussion From: bmeng.cn at gmail.com (Bin Meng) Date: Thu, 16 Apr 2020 08:09:29 -0700 Subject: [PATCH v2 2/6] riscv: Merge unnecessary SMP ifdefs in start.S In-Reply-To: <1587049773-1464-1-git-send-email-bmeng.cn@gmail.com> References: <1587049773-1464-1-git-send-email-bmeng.cn@gmail.com> Message-ID: <1587049773-1464-3-git-send-email-bmeng.cn@gmail.com> Two consecutive SMP ifdefs blocks can be combined into one. Signed-off-by: Bin Meng Reviewed-by: Atish Patra --- Changes in v2: None arch/riscv/cpu/start.S | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 6b3ff99..ecf0482 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -58,9 +58,7 @@ _start: /* tp: hart id */ li t0, CONFIG_NR_CPUS bge tp, t0, hart_out_of_bounds_loop -#endif -#ifdef CONFIG_SMP /* set xSIE bit to receive IPIs */ #if CONFIG_IS_ENABLED(RISCV_MMODE) li t0, MIE_MSIE @@ -377,9 +375,7 @@ hart_out_of_bounds_loop: /* Harts in this loop are out of bounds, increase CONFIG_NR_CPUS. */ wfi j hart_out_of_bounds_loop -#endif -#ifdef CONFIG_SMP /* SMP relocation entry */ secondary_hart_relocate: /* a1: new sp */