From patchwork Fri Jan 10 07:35:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Wallner X-Patchwork-Id: 239370 List-Id: U-Boot discussion From: wolfgang.wallner at br-automation.com (Wolfgang Wallner) Date: Fri, 10 Jan 2020 08:35:12 +0100 Subject: [PATCH 2/3] gpio: intel_gpio: Clear tx state bit when setting output In-Reply-To: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> References: <20200110073513.19472-1-wolfgang.wallner@br-automation.com> Message-ID: <20200110073513.19472-3-wolfgang.wallner@br-automation.com> Add missing 'PAD_CFG0_TX_STATE' to the clear mask for pcr_clrsetbits32(). Otherwise this bit cannot be cleared again after it has been set once. Signed-off-by: Wolfgang Wallner Reviewed-by: Simon Glass --- drivers/gpio/intel_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index db63115628..ec1a315ae2 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -41,7 +41,7 @@ static int intel_gpio_direction_output(struct udevice *dev, uint offset, pcr_clrsetbits32(pinctrl, config_offset, PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE | - PAD_CFG0_TX_DISABLE, + PAD_CFG0_TX_DISABLE | PAD_CFG0_TX_STATE, PAD_CFG0_MODE_GPIO | PAD_CFG0_RX_DISABLE | (value ? PAD_CFG0_TX_STATE : 0));