From patchwork Sat Jan 11 19:36:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Johnson X-Patchwork-Id: 239477 List-Id: U-Boot discussion From: mrjoel at lixil.net (Joel Johnson) Date: Sat, 11 Jan 2020 12:36:33 -0700 Subject: [PATCH 04/10] arm: mvebu: clearfog: Add SATA mode flags In-Reply-To: <20200111193639.19022-1-mrjoel@lixil.net> References: <20200111193639.19022-1-mrjoel@lixil.net> Message-ID: <20200111193639.19022-4-mrjoel@lixil.net> The mPCIe slots on ClearFog Pro and ClearFog Base may be alternately configured for SATA usage. Signed-off-by: Joel Johnson --- board/solidrun/clearfog/Kconfig | 17 +++++++++++++++++ board/solidrun/clearfog/clearfog.c | 6 ++++++ 2 files changed, 23 insertions(+) diff --git a/board/solidrun/clearfog/Kconfig b/board/solidrun/clearfog/Kconfig index d122be9196..30f53508c2 100644 --- a/board/solidrun/clearfog/Kconfig +++ b/board/solidrun/clearfog/Kconfig @@ -7,4 +7,21 @@ config TARGET_CLEARFOG_BASE Configure for the ClearFog Base board variant. By default the ClearFog Pro variant will be configured. +config CLEARFOG_CON3_SATA + bool "Use CON3 slot in SATA mode" + help + Use the CON3 port with SATA protocol instead of the default PCIe. + The ClearFog port allows usage of either mSATA or miniPCIe + modules, but the desired protocol must be configured at build + time since it affects the SerDes topology layout. + +config CLEARFOG_CON2_SATA + bool "Use CON2 slot in SATA mode" + depends on !TARGET_CLEARFOG_BASE + help + Use the CON2 port with SATA protocol instead of the default PCIe. + The ClearFog port allows usage of either mSATA or miniPCIe + modules, but the desired protocol must be configured at build + time since it affects the SerDes topology layout. + endmenu diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 44aac907fd..4f51b19ce9 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -31,10 +31,16 @@ DECLARE_GLOBAL_DATA_PTR; static struct serdes_map board_serdes_map[] = { {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, {SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}, +#if defined (CONFIG_CLEARFOG_CON3_SATA) + {SATA1, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, +#else {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, +#endif {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, #if defined (CONFIG_TARGET_CLEARFOG_BASE) {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, +#elif defined(CONFIG_CLEARFOG_CON2_SATA) + {SATA2, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, #else {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, #endif