From patchwork Thu Jan 23 18:48:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 239995 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Thu, 23 Jan 2020 11:48:04 -0700 Subject: [PATCH v3 01/23] i2c: designware_i2c: Add more registers In-Reply-To: <20200123184826.116850-1-sjg@chromium.org> References: <20200123184826.116850-1-sjg@chromium.org> Message-ID: <20200123114556.v3.1.If37e17d4b2c18747bafd9953e17d5014626a9f71@changeid> Some versions of this peripherals provide more control of the bus behaviour. Add definitions for these registers. Signed-off-by: Simon Glass Reviewed-by: Ley Foon Tan Reviewed-by: Jun Chen Reviewed-by: Heiko Schocher --- Changes in v3: - Fix the address of comp_param1 by adding a gap Changes in v2: - Fix 'previde' typo drivers/i2c/designware_i2c.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h index 48766d0806..3b407d2bed 100644 --- a/drivers/i2c/designware_i2c.h +++ b/drivers/i2c/designware_i2c.h @@ -43,8 +43,20 @@ struct i2c_regs { u32 ic_rxflr; /* 0x78 */ u32 ic_sda_hold; /* 0x7c */ u32 ic_tx_abrt_source; /* 0x80 */ - u8 res1[0x18]; /* 0x84 */ + u32 slv_data_nak_only; + u32 dma_cr; + u32 dma_tdlr; + u32 dma_rdlr; + u32 sda_setup; + u32 ack_general_call; u32 ic_enable_status; /* 0x9c */ + u32 fs_spklen; + u32 hs_spklen; + u32 clr_restart_det; + u8 reserved[0xf4 - 0xac]; + u32 comp_param1; /* 0xf4 */ + u32 comp_version; + u32 comp_type; }; #if !defined(IC_CLK)