| Message ID | 20200203134654.17832-2-lokeshvutla@ti.com |
|---|---|
| State | Accepted |
| Commit | fde109dc75686cf3d49970ea838d76ec840f4347 |
| Headers | show |
| Series | arm: k3-j721e: Fix uart boot | expand |
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 28a355d49c..64c31e23ca 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -143,9 +143,13 @@ }; &mcu_uart0 { + /delete-property/ power-domains; + /delete-property/ clocks; + /delete-property/ clock-names; pinctrl-names = "default"; pinctrl-0 = <&mcu_uart0_pins_default>; status = "okay"; + clock-frequency = <48000000>; }; &main_uart0 {
mcu uart will be used during uart boot for loading sysfw.itb. Since sysfw is not yet available during uart load, power-domain cannot be enabled. We need to rely on ROM for doing that, so disable power-domains and clocks for mcu uart. Also fix the mcu uart frequency. Signed-off-by: Lokesh Vutla <lokeshvutla at ti.com> --- arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 4 ++++ 1 file changed, 4 insertions(+)