From patchwork Sat Feb 15 20:10:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heinrich Schuchardt X-Patchwork-Id: 236393 List-Id: U-Boot discussion From: xypron.glpk at gmx.de (Heinrich Schuchardt) Date: Sat, 15 Feb 2020 21:10:54 +0100 Subject: [PATCH 1/1] clk: meson-g12a: missing break Message-ID: <20200215201054.5139-1-xypron.glpk@gmx.de> Add missing break for CLKID_PCIE_PLL in switch statement. Reported by CppCheck. Cc: Neil Armstrong Fixes: 08e09c263fdf ("clk: meson-g12a: Add PCIE PLL support") Signed-off-by: Heinrich Schuchardt Reviewed-by: Lukasz Majewski Acked-by: Neil Armstrong --- Looking at the code it seems obvious that something is wrong in commit 08e09c263fdf but I have no board for testing. --- drivers/clk/meson/g12a.c | 1 + 1 file changed, 1 insertion(+) -- 2.25.0 diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 686d94ebfe..cada80e6b5 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -804,6 +804,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id) break; case CLKID_PCIE_PLL: rate = meson_pcie_pll_get_rate(clk); + break; case CLKID_VPU_0: rate = meson_div_get_rate(clk, CLKID_VPU_0_DIV); break;