From patchwork Mon Mar 9 03:44:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 243400 List-Id: U-Boot discussion From: sjg at chromium.org (Simon Glass) Date: Sun, 8 Mar 2020 21:44:52 -0600 Subject: [PATCH v2 28/39] acpi: Add some tables required by the generation code In-Reply-To: <20200309034504.149659-1-sjg@chromium.org> References: <20200309034504.149659-1-sjg@chromium.org> Message-ID: <20200308214442.v2.28.I0e2a72f2eafe37b48ffe957baa419baab129b5b4@changeid> The code which generates ACPI tables programmatically, add a few ACPI definitions required by that code. Signed-off-by: Simon Glass --- Changes in v2: None include/acpi_table.h | 50 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/include/acpi_table.h b/include/acpi_table.h index f500f0d3fe..5fd2cef5d1 100644 --- a/include/acpi_table.h +++ b/include/acpi_table.h @@ -28,6 +28,18 @@ struct acpi_ctx; +/* + * The assigned ACPI ID for the coreboot project is 'BOOT' + * http://www.uefi.org/acpi_id_list + */ +#define COREBOOT_ACPI_ID "BOOT" /* ACPI ID for coreboot HIDs */ + +/* List of ACPI HID that use the coreboot ACPI ID */ +enum coreboot_acpi_ids { + COREBOOT_ACPI_ID_CBTABLE = 0x0000, /* BOOT0000 */ + COREBOOT_ACPI_ID_MAX = 0xFFFF, /* BOOTFFFF */ +}; + /* * RSDP (Root System Description Pointer) * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum @@ -365,6 +377,44 @@ struct acpi_csrt_shared_info { u32 max_block_size; }; +struct __packed acpi_cstate { + u8 ctype; + u16 latency; + u32 power; + struct acpi_gen_regaddr resource; +}; + +struct __packed acpi_tstate { + u32 percent; + u32 power; + u32 latency; + u32 control; + u32 status; +}; + +/* Port types for ACPI _UPC object */ +enum acpi_upc_type { + UPC_TYPE_A, + UPC_TYPE_MINI_AB, + UPC_TYPE_EXPRESSCARD, + UPC_TYPE_USB3_A, + UPC_TYPE_USB3_B, + UPC_TYPE_USB3_MICRO_B, + UPC_TYPE_USB3_MICRO_AB, + UPC_TYPE_USB3_POWER_B, + UPC_TYPE_C_USB2_ONLY, + UPC_TYPE_C_USB2_SS_SWITCH, + UPC_TYPE_C_USB2_SS, + UPC_TYPE_PROPRIETARY = 0xff, + /* + * The following types are not directly defined in the ACPI + * spec but are used by coreboot to identify a USB device type. + */ + UPC_TYPE_INTERNAL = 0xff, + UPC_TYPE_UNUSED, + UPC_TYPE_HUB +}; + enum dmar_type { DMAR_DRHD = 0, DMAR_RMRR = 1,