From patchwork Wed Apr 22 13:52:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 238307 List-Id: U-Boot discussion From: peng.fan at nxp.com (Peng Fan) Date: Wed, 22 Apr 2020 21:52:17 +0800 Subject: [PATCH 06/24] imx: imx8m: add i.MX8MN variants support In-Reply-To: <20200422135235.14756-1-peng.fan@nxp.com> References: <20200422135235.14756-1-peng.fan@nxp.com> Message-ID: <20200422135235.14756-6-peng.fan@nxp.com> Add i.MX8MN variants support Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx/cpu.h | 5 +++++ arch/arm/include/asm/mach-imx/sys_proto.h | 9 ++++++++- arch/arm/mach-imx/cpu.c | 12 +++++++++++- arch/arm/mach-imx/imx8m/soc.c | 19 ++++++++++++++++++- 4 files changed, 42 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index 71f0715dd1..b52565473d 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -35,6 +35,11 @@ #define MXC_CPU_IMX8MMS 0x89 /* dummy ID */ #define MXC_CPU_IMX8MMSL 0x8a /* dummy ID */ #define MXC_CPU_IMX8MN 0x8b /* dummy ID */ +#define MXC_CPU_IMX8MND 0x8c /* dummy ID */ +#define MXC_CPU_IMX8MNS 0x8d /* dummy ID */ +#define MXC_CPU_IMX8MNL 0x8e /* dummy ID */ +#define MXC_CPU_IMX8MNDL 0x8f /* dummy ID */ +#define MXC_CPU_IMX8MNSL 0x181 /* dummy ID */ #define MXC_CPU_IMX8MP 0x182/* dummy ID */ #define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */ #define MXC_CPU_IMX8QM 0x91 /* dummy ID */ diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 59b145bab1..a02cd40c7d 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -55,7 +55,14 @@ #define is_imx8mmdl() (is_cpu_type(MXC_CPU_IMX8MMDL)) #define is_imx8mms() (is_cpu_type(MXC_CPU_IMX8MMS)) #define is_imx8mmsl() (is_cpu_type(MXC_CPU_IMX8MMSL)) -#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN)) +#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN) || is_cpu_type(MXC_CPU_IMX8MND) || \ + is_cpu_type(MXC_CPU_IMX8MNS) || is_cpu_type(MXC_CPU_IMX8MNL) || \ + is_cpu_type(MXC_CPU_IMX8MNDL) || is_cpu_type(MXC_CPU_IMX8MNSL)) +#define is_imx8mnd() (is_cpu_type(MXC_CPU_IMX8MND)) +#define is_imx8mns() (is_cpu_type(MXC_CPU_IMX8MNS)) +#define is_imx8mnl() (is_cpu_type(MXC_CPU_IMX8MNL)) +#define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL)) +#define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL)) #define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP)) #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP)) diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index e07ca5821a..e83f6934cd 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -95,7 +95,17 @@ const char *get_imx_type(u32 imxtype) case MXC_CPU_IMX8MP: return "8MP"; /* Quad-core version of the imx8mp */ case MXC_CPU_IMX8MN: - return "8MNano";/* Quad-core version of the imx8mn */ + return "8MNano Quad"; /* Quad-core version */ + case MXC_CPU_IMX8MND: + return "8MNano Dual"; /* Dual-core version */ + case MXC_CPU_IMX8MNS: + return "8MNano Solo"; /* Single-core version */ + case MXC_CPU_IMX8MNL: + return "8MNano QuadLite"; /* Quad-core Lite version */ + case MXC_CPU_IMX8MNDL: + return "8MNano DualLite"; /* Dual-core Lite version */ + case MXC_CPU_IMX8MNSL: + return "8MNano SoloLite"; /* Single-core Lite version */ case MXC_CPU_IMX8MM: return "8MMQ"; /* Quad-core version of the imx8mm */ case MXC_CPU_IMX8MML: diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index c449b8b1ec..871179509c 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -188,6 +188,23 @@ static u32 get_cpu_variant_type(u32 type) return MXC_CPU_IMX8MML; break; } + } else if (type == MXC_CPU_IMX8MN) { + switch (value & 0x3) { + case 2: + if (value & 0x1000000) + return MXC_CPU_IMX8MNDL; + else + return MXC_CPU_IMX8MND; + case 3: + if (value & 0x1000000) + return MXC_CPU_IMX8MNSL; + else + return MXC_CPU_IMX8MNS; + default: + if (value & 0x1000000) + return MXC_CPU_IMX8MNL; + break; + } } return type; @@ -208,7 +225,7 @@ u32 get_cpu_rev(void) return (MXC_CPU_IMX8MP << 12) | reg; } else if (major_low == 0x42) { /* iMX8MN */ - return (MXC_CPU_IMX8MN << 12) | reg; + type = get_cpu_variant_type(MXC_CPU_IMX8MN); } else if (major_low == 0x41) { type = get_cpu_variant_type(MXC_CPU_IMX8MM); } else {