From patchwork Sat May 2 09:35:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 244830 List-Id: U-Boot discussion From: frank.wunderlich at gmail.com (Frank Wunderlich) Date: Sat, 2 May 2020 11:35:19 +0200 Subject: [PATCH v8 11/14] arm: dts: mt7629: add usb related nodes In-Reply-To: <20200502093522.3568-1-frank-w@public-files.de> References: <20200502093522.3568-1-frank-w@public-files.de> Message-ID: <20200502093522.3568-12-frank-w@public-files.de> From: Chunfeng Yun Add usb, phy and clock nodes Signed-off-by: Chunfeng Yun Signed-off-by: Frank Wunderlich Reviewed-by: Weijie Gao --- v8: no changes v7: no changes v6: add Reviewed-by Weijie v3~v5: no changes v2: 1. remove fixed clock clk20m --- arch/arm/dts/mt7629-rfb.dts | 8 ++++++++ arch/arm/dts/mt7629.dtsi | 41 +++++++++++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts index 687fe1c029..bf84f76344 100644 --- a/arch/arm/dts/mt7629-rfb.dts +++ b/arch/arm/dts/mt7629-rfb.dts @@ -82,6 +82,14 @@ status = "okay"; }; +&xhci { + status = "okay"; +}; + +&u3phy { + status = "okay"; +}; + &watchdog { pinctrl-names = "default"; pinctrl-0 = <&watchdog_pins>; diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi index 644d2da4a8..6850e0058d 100644 --- a/arch/arm/dts/mt7629.dtsi +++ b/arch/arm/dts/mt7629.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -222,6 +223,46 @@ #size-cells = <0>; }; + ssusbsys: ssusbsys at 1a000000 { + compatible = "mediatek,mt7629-ssusbsys", "syscon"; + reg = <0x1a000000 0x1000>; + #clock-cells = <1>; + }; + + xhci: usb at 1a0c0000 { + compatible = "mediatek,mt7629-xhci", "mediatek,mtk-xhci"; + reg = <0x1a0c0000 0x1000>, <0x1a0c3e00 0x0100>; + reg-names = "mac", "ippc"; + power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>; + clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, + <&ssusbsys CLK_SSUSB_REF_EN>, + <&ssusbsys CLK_SSUSB_MCU_EN>, + <&ssusbsys CLK_SSUSB_DMA_EN>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; + phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>; + status = "disabled"; + }; + + u3phy: usb-phy at 1a0c4000 { + compatible = "mediatek,mt7629-tphy", "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1a0c4000 0x1000>; + status = "disabled"; + + u2port0: usb-phy at 0 { + reg = <0x0 0x0700>; + #phy-cells = <1>; + clocks = <&ssusbsys CLK_SSUSB_U2_PHY_EN>; + clock-names = "ref"; + }; + + u3port0: usb-phy at 700 { + reg = <0x0700 0x0700>; + #phy-cells = <1>; + }; + }; + ethsys: syscon at 1b000000 { compatible = "mediatek,mt7629-ethsys", "syscon"; reg = <0x1b000000 0x1000>;