| Message ID | 20200513071344.5430-3-frank.wang@rock-chips.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add Rockchip RK3399 USB3.0 Host support | expand |
On 2020/5/13 ??3:13, Frank Wang wrote: > From: Jagan Teki <jagan at amarulasolutions.com> > > Due to v5.7-rc1 sync the SD controller nodes in rk3399.dtsi > have SCLK_UPHY0_TCPDCORE, SCLK_UPHY1_TCPDCORE assigned-clocks > which are usually required for Linux and don't require to > handle them in U-Boot. > > assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>; > assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>; > > So, mark them as empty in clock otherwise device probe on > those typec phy driver would fail. > > Signed-off-by: Jagan Teki <jagan at amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang at rock-chips.com> Thanks, - Kever > --- > drivers/clk/rockchip/clk_rk3399.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c > index b53f2f984e..98fc6a3267 100644 > --- a/drivers/clk/rockchip/clk_rk3399.c > +++ b/drivers/clk/rockchip/clk_rk3399.c > @@ -997,6 +997,8 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) > case ACLK_VOP1: > case HCLK_VOP1: > case HCLK_SD: > + case SCLK_UPHY0_TCPDCORE: > + case SCLK_UPHY1_TCPDCORE: > /** > * assigned-clocks handling won't require for vopl, so > * return 0 to satisfy clk_set_defaults during device probe.
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index b53f2f984e..98fc6a3267 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -997,6 +997,8 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) case ACLK_VOP1: case HCLK_VOP1: case HCLK_SD: + case SCLK_UPHY0_TCPDCORE: + case SCLK_UPHY1_TCPDCORE: /** * assigned-clocks handling won't require for vopl, so * return 0 to satisfy clk_set_defaults during device probe.