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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id u24-20020a2e8558000000b002a7aa25c3b6sm674256ljj.88.2023.04.21.10.50.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Apr 2023 10:50:49 -0700 (PDT) From: Vladimir Zapolskiy To: Tom Rini , Simon Glass , Ramon Fried , Dzmitry Sankouski Cc: Konrad Dybcio , Bhupesh Sharma , u-boot@lists.denx.de Subject: [PATCH v3 5/9] serial: msm-geni: fix code indentation Date: Fri, 21 Apr 2023 20:50:37 +0300 Message-Id: <20230421175041.275566-6-vladimir.zapolskiy@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20230421175041.275566-1-vladimir.zapolskiy@linaro.org> References: <20230421175041.275566-1-vladimir.zapolskiy@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This a cosmetic change, which corrects code indentation in a few places. Signed-off-by: Vladimir Zapolskiy Reviewed-by: Konrad Dybcio --- drivers/serial/serial_msm_geni.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c index 8fd769eb4d0d..55dd9188a56c 100644 --- a/drivers/serial/serial_msm_geni.c +++ b/drivers/serial/serial_msm_geni.c @@ -130,8 +130,8 @@ struct msm_serial_data { }; unsigned long root_freq[] = {7372800, 14745600, 19200000, 29491200, - 32000000, 48000000, 64000000, 80000000, - 96000000, 100000000}; + 32000000, 48000000, 64000000, 80000000, + 96000000, 100000000}; /** * get_clk_cfg() - Get clock rate to apply on clock supplier. @@ -160,8 +160,7 @@ static int get_clk_cfg(unsigned long clk_freq) * * Return: frequency, supported by clock supplier, multiple of clk_freq. */ -static int get_clk_div_rate(u32 baud, - u64 sampling_rate, u32 *clk_div) +static int get_clk_div_rate(u32 baud, u64 sampling_rate, u32 *clk_div) { unsigned long ser_clk; unsigned long desired_clk; @@ -228,7 +227,7 @@ static inline u32 geni_se_get_tx_fifo_width(long base) } static inline void geni_serial_baud(phys_addr_t base_address, u32 clk_div, - int baud) + int baud) { u32 s_clk_cfg = 0; @@ -268,7 +267,7 @@ int msm_serial_setbrg(struct udevice *dev, int baud) * reached. */ static bool qcom_geni_serial_poll_bit(const struct udevice *dev, int offset, - int field, bool set) + int field, bool set) { u32 reg; struct msm_serial_data *priv = dev_get_priv(dev);