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bh=KnQmLgNJ4/6SJdzPvK8EpKxvwTmjdjJNqopvwcJ4JYM=; b=AjNuEhrW6YE0sGM/yQOJ430izYbWercrog/rWefQJ1qWg0OyjOmmaxj5NcrhM+sn0I xSvlhJxj8kFXrkWpGy2koVKxovYbH0V6PoZ4HLhYPDSMBPiBDor2mBhORpc693s7Ogqv yIK03bVqknlcai8XKw98EJkvsbi3XhWOs+QlH09dmoIg7v5VCvDiPB35Ro3Hxcw5K8Sh jLSQ91+TSL6IqTnfBWl7IBoeNGy+C7oowouv96SafJZhm5oI4KgTWr1cFlWZelQKdM5y N7vy8X5Z+h2ujIi8BLLkQ2YSNsH6nbGI6qXkw0zr8bhiYu6Ss7ByHktF8XSDUw45s2f4 zRAg== X-Gm-Message-State: AOJu0Yw90z3xEnuIi9LAavRKGUlasl8naSBsXv7RHlDamJpBe6ZTGJSX khsFGQywKXTLVPeMRibwUqAp60oiG0UWWsM3MN4= X-Received: by 2002:a9d:6c02:0:b0:6d8:16ab:2b10 with SMTP id f2-20020a9d6c02000000b006d816ab2b10mr812179otq.10.1701375236936; Thu, 30 Nov 2023 12:13:56 -0800 (PST) Received: from localhost ([136.62.192.75]) by smtp.gmail.com with ESMTPSA id l1-20020a05683004a100b006d84b790e3bsm263880otd.49.2023.11.30.12.13.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 12:13:56 -0800 (PST) From: Sam Protsenko To: Minkyu Kang , Tom Rini Cc: Andre Przywara , Simon Glass , u-boot@lists.denx.de Subject: [PATCH 5/7] pinctrl: exynos: Refactor handling the pin related dt properties Date: Thu, 30 Nov 2023 14:13:50 -0600 Message-Id: <20231130201352.6379-6-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231130201352.6379-1-semen.protsenko@linaro.org> References: <20231130201352.6379-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean All pin related dt properties (pin-function, pin-pud and pin-drv) are handled in a very similar way. Get rid of that code duplication by extracting the corresponding data knowledge into an actual data structure (array), and then just iterating over it. No functional change, it's a refactoring commit. Signed-off-by: Sam Protsenko --- drivers/pinctrl/exynos/pinctrl-exynos.c | 35 ++++++++++++++----------- 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c index 9a51653be864..e79ce5113d84 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos.c @@ -21,6 +21,13 @@ const struct samsung_pin_bank_type bank_type_alive = { .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, }; +static const char * const exynos_pinctrl_props[PINCFG_TYPE_NUM] = { + [PINCFG_TYPE_FUNC] = "samsung,pin-function", + [PINCFG_TYPE_DAT] = "samsung,pin-val", + [PINCFG_TYPE_PUD] = "samsung,pin-pud", + [PINCFG_TYPE_DRV] = "samsung,pin-drv", +}; + /** * exynos_pinctrl_setup_peri: setup pinctrl for a peripheral. * conf: soc specific pin configuration data array @@ -114,7 +121,7 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) const void *fdt = gd->fdt_blob; int node = dev_of_offset(config); unsigned int count, idx, pin_num; - unsigned int pinfunc, pinpud, pindrv; + unsigned int pinvals[PINCFG_TYPE_NUM]; unsigned long reg; const char *name; @@ -126,13 +133,16 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) if (count <= 0) return -EINVAL; - pinfunc = fdtdec_get_int(fdt, node, "samsung,pin-function", -1); - pinpud = fdtdec_get_int(fdt, node, "samsung,pin-pud", -1); - pindrv = fdtdec_get_int(fdt, node, "samsung,pin-drv", -1); + for (idx = 0; idx < PINCFG_TYPE_NUM; ++idx) { + pinvals[idx] = fdtdec_get_int(fdt, node, + exynos_pinctrl_props[idx], -1); + } + pinvals[PINCFG_TYPE_DAT] = -1; /* ignore GPIO data register */ for (idx = 0; idx < count; idx++) { const struct samsung_pin_bank_data *bank; char bank_name[10]; + int pincfg; name = fdt_stringlist_get(fdt, node, "samsung,pins", idx, NULL); if (!name) @@ -141,19 +151,12 @@ int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config) bank = get_bank(dev, bank_name); reg = priv->base + bank->offset; - if (pinfunc != -1) { - exynos_pinctrl_set_pincfg(reg, pin_num, pinfunc, - PINCFG_TYPE_FUNC, bank->type); - } - - if (pinpud != -1) { - exynos_pinctrl_set_pincfg(reg, pin_num, pinpud, - PINCFG_TYPE_PUD, bank->type); - } + for (pincfg = 0; pincfg < PINCFG_TYPE_NUM; ++pincfg) { + unsigned int val = pinvals[pincfg]; - if (pindrv != -1) { - exynos_pinctrl_set_pincfg(reg, pin_num, pindrv, - PINCFG_TYPE_DRV, bank->type); + if (val != -1) + exynos_pinctrl_set_pincfg(reg, pin_num, val, + pincfg, bank->type); } }