| Message ID | 20231219-b4-qcom-common-target-v2-16-b6dd9704219e@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Qualcomm generic board support | expand |
On 19/12/2023 16:04, Caleb Connolly wrote: > Heavily inspired by Apple board code. Use the LMB allocator to configure > load addresses at runtime, and implement a lookup table for selecting a > devicetree. > > As some Qualcomm RBx boards have different RAM capacities and base > addresses, it isn't possible to hardcode these regions. > > Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > arch/arm/Kconfig | 1 + > arch/arm/mach-snapdragon/board.c | 35 ++++++++++++++++++++++++ > board/qualcomm/dragonboard410c/dragonboard410c.c | 2 +- > 3 files changed, 37 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index e814910cb495..5ed9cbf378fa 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -1075,6 +1075,7 @@ config ARCH_SNAPDRAGON > select OF_SEPARATE > select SMEM > select SPMI > + select BOARD_LATE_INIT > select OF_BOARD > select SAVE_PREV_BL_FDT_ADDR > select LINUX_KERNEL_IMAGE_HEADER > diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c > index bf9b57682178..b00f536d38b4 100644 > --- a/arch/arm/mach-snapdragon/board.c > +++ b/arch/arm/mach-snapdragon/board.c > @@ -20,6 +20,7 @@ > #include <linux/bug.h> > #include <linux/psci.h> > #include <linux/sizes.h> > +#include <lmb.h> > #include <malloc.h> > > DECLARE_GLOBAL_DATA_PTR; > @@ -112,6 +113,40 @@ int board_init(void) > return 0; > } > > +void __weak qcom_late_init(void) > +{ > +} > + > +#define KERNEL_COMP_SIZE SZ_64M > +#define SZ_96M (SZ_64M + SZ_32M) This patch should have been adjusted to use SZ_128M, I already confirmed this to work on all boards. Somehow the old version crept in. > + > +#define addr_alloc(lmb, size) lmb_alloc(lmb, size, SZ_2M) > + > +/* Stolen from arch/arm/mach-apple/board.c */ > +int board_late_init(void) > +{ > + struct lmb lmb; > + u32 status = 0; > + > + lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob); > + > + /* We need to be fairly conservative here as we support boards with just 1G of TOTAL RAM */ > + status |= env_set_hex("kernel_addr_r", addr_alloc(&lmb, SZ_128M)); > + status |= env_set_hex("ramdisk_addr_r", addr_alloc(&lmb, SZ_96M)); > + status |= env_set_hex("kernel_comp_addr_r", addr_alloc(&lmb, KERNEL_COMP_SIZE)); > + status |= env_set_hex("kernel_comp_size", KERNEL_COMP_SIZE); > + status |= env_set_hex("scriptaddr", addr_alloc(&lmb, SZ_4M)); > + status |= env_set_hex("pxefile_addr_r", addr_alloc(&lmb, SZ_4M)); > + status |= env_set_hex("fdt_addr_r", addr_alloc(&lmb, SZ_2M)); > + > + if (status) > + log_warning("%s: Failed to set run time variables\n", __func__); > + > + qcom_late_init(); > + > + return 0; > +} > + > static void build_mem_map(void) > { > int i; > diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c > index e403ecf0ad7c..2a502c7c2841 100644 > --- a/board/qualcomm/dragonboard410c/dragonboard410c.c > +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c > @@ -77,7 +77,7 @@ int misc_init_r(void) > return 0; > } > > -int board_late_init(void) > +int qcom_late_init(void) > { > char serial[16]; > >
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e814910cb495..5ed9cbf378fa 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1075,6 +1075,7 @@ config ARCH_SNAPDRAGON select OF_SEPARATE select SMEM select SPMI + select BOARD_LATE_INIT select OF_BOARD select SAVE_PREV_BL_FDT_ADDR select LINUX_KERNEL_IMAGE_HEADER diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c index bf9b57682178..b00f536d38b4 100644 --- a/arch/arm/mach-snapdragon/board.c +++ b/arch/arm/mach-snapdragon/board.c @@ -20,6 +20,7 @@ #include <linux/bug.h> #include <linux/psci.h> #include <linux/sizes.h> +#include <lmb.h> #include <malloc.h> DECLARE_GLOBAL_DATA_PTR; @@ -112,6 +113,40 @@ int board_init(void) return 0; } +void __weak qcom_late_init(void) +{ +} + +#define KERNEL_COMP_SIZE SZ_64M +#define SZ_96M (SZ_64M + SZ_32M) + +#define addr_alloc(lmb, size) lmb_alloc(lmb, size, SZ_2M) + +/* Stolen from arch/arm/mach-apple/board.c */ +int board_late_init(void) +{ + struct lmb lmb; + u32 status = 0; + + lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob); + + /* We need to be fairly conservative here as we support boards with just 1G of TOTAL RAM */ + status |= env_set_hex("kernel_addr_r", addr_alloc(&lmb, SZ_128M)); + status |= env_set_hex("ramdisk_addr_r", addr_alloc(&lmb, SZ_96M)); + status |= env_set_hex("kernel_comp_addr_r", addr_alloc(&lmb, KERNEL_COMP_SIZE)); + status |= env_set_hex("kernel_comp_size", KERNEL_COMP_SIZE); + status |= env_set_hex("scriptaddr", addr_alloc(&lmb, SZ_4M)); + status |= env_set_hex("pxefile_addr_r", addr_alloc(&lmb, SZ_4M)); + status |= env_set_hex("fdt_addr_r", addr_alloc(&lmb, SZ_2M)); + + if (status) + log_warning("%s: Failed to set run time variables\n", __func__); + + qcom_late_init(); + + return 0; +} + static void build_mem_map(void) { int i; diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c index e403ecf0ad7c..2a502c7c2841 100644 --- a/board/qualcomm/dragonboard410c/dragonboard410c.c +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c @@ -77,7 +77,7 @@ int misc_init_r(void) return 0; } -int board_late_init(void) +int qcom_late_init(void) { char serial[16];
Heavily inspired by Apple board code. Use the LMB allocator to configure load addresses at runtime, and implement a lookup table for selecting a devicetree. As some Qualcomm RBx boards have different RAM capacities and base addresses, it isn't possible to hardcode these regions. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> --- arch/arm/Kconfig | 1 + arch/arm/mach-snapdragon/board.c | 35 ++++++++++++++++++++++++ board/qualcomm/dragonboard410c/dragonboard410c.c | 2 +- 3 files changed, 37 insertions(+), 1 deletion(-)