From patchwork Mon Feb 26 17:26:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 775913 Delivered-To: patch@linaro.org Received: by 2002:ab3:621a:0:b0:258:3251:9e33 with SMTP id w26csp1493041lte; Mon, 26 Feb 2024 09:27:52 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUjOJag+pGjiQwwIrN2DtKZONfsZXKvT0qbGGXROQAJFfXNj9ibmEnAnWdAcL9IASp+8toPqqcIs1QDrAWteT8H X-Google-Smtp-Source: AGHT+IG+VJ5zoJEo9qmFmoVSyTxU7wsWu7fsDeyzWlDj2we12wwKmHEZUZQpDLpBK4N0VJYPs0Ub X-Received: by 2002:a5d:4690:0:b0:33d:3695:5880 with SMTP id u16-20020a5d4690000000b0033d36955880mr4987535wrq.48.1708968472072; Mon, 26 Feb 2024 09:27:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1708968472; cv=none; d=google.com; s=arc-20160816; b=gnFuEuI6JYMRY853QMW3JGh97UksHiSd87tC0eRtpOdmHIVL38ZqxL04HXvL56XaDB KQZ1SIvz1b5XVDJKZZwxxY8vFpwwNqOaEjdZkzdY6AGKCJSe/7IXAaE9CCOkMhQsjumv eIJAclIT1sot8VfEcL4GxTUcbEmpK9471aAQZ9qCEINELpW7WyQAfDTKBaiU3TGjC/EH 6yzcBloNkK42dN8j26NlVw/8NbG1xqcl+BuZ7K5F+yJyXNYKcnC9eUs4Xy8M4BL7f6Df 3168xO0A1fw57kNgQVc9ppiKVnMAxs01hehNiSf9OEL1Ok/olyLF7T98qsA0ONGMCoe8 ekeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=/upDeB2lHfVp43bmnJiD8NyAJ4g/kBSf+1n7Si5I7eo=; fh=Wxb83wGTswnU4ealtTSrpQnUlCcmhqnHG/jbaIgDROw=; b=vN4e6ioV86j/HgqZY6mzql+BtXXUPI71uk5W0WrFoligkjzCIQ4vx54isOoKUqtKGB WggHqVMODtS7xc1sGlUhGhNUMSK8bkp1yJ98YWmsLF04ScNetEGSkYajbHV2i1LnP2J+ RbY4pfNYPIP5BLI1H+gdpSIgsy3WyRtSG2uD4N91PJhp5JVd1agETcsUJdF8wyO515EQ HT4PldeSlR/UGBvkxxRzUZSVp4duyEcMZhXbSWs2M4QpwyO0mxB4HB897SfE2GB3nnSe CteAnnuYMOFe+DuarRJ58deorBxVNQvjplhDFpuNrJGWH8L2ydp+QkxVNdb2Qz4lTkHJ k17w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jlfZkiQw; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [85.214.62.61]) by mx.google.com with ESMTPS id i8-20020adff308000000b0033d7543c3a4si2743654wro.910.2024.02.26.09.27.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Feb 2024 09:27:52 -0800 (PST) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jlfZkiQw; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 24D6887F62; Mon, 26 Feb 2024 18:26:37 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="jlfZkiQw"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id F1E9387F23; Mon, 26 Feb 2024 18:26:34 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4053187F42 for ; Mon, 26 Feb 2024 18:26:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=caleb.connolly@linaro.org Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-33d38c9ca5bso1781708f8f.2 for ; Mon, 26 Feb 2024 09:26:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708968389; x=1709573189; darn=lists.denx.de; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/upDeB2lHfVp43bmnJiD8NyAJ4g/kBSf+1n7Si5I7eo=; b=jlfZkiQwSd1lpMNUJM6RSaJrv3DfKpNXa+rKwpV7+NtgVwcwT5C8khjOhWFjBpSgxW SkUyiyCOsZZJ2Izq6xqFe7EYK0UGn35Dc3OVBK27S14zBPZ6sBXXkE5WfpXvq6cUAGYG cPXB+1tInjxLn1wZAUc5hnXQ7UYBPitBnFBCHKoVq6CT9dX6vrUH+RlUfYvI2AailUUr TrMT8+7zl+nMlCFtBkYxGh18g2ScFjx6dZkz6KGfHUNF6X6BbYbj5ujjbOy7Ul3aJ4fX KJv2DTgHz8OOH0k7A/H9i1Yte0ZJdyyib561ZVLuQ3AXJsCHDIgRa81Fcavgvt6eJacZ bOeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708968389; x=1709573189; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/upDeB2lHfVp43bmnJiD8NyAJ4g/kBSf+1n7Si5I7eo=; b=CeWXY+axbTXkAS80VVk3l6NjzoiL+36oXmbE8krkb0R0aAAeeLmqmasyCT/6/Mf7Vs 5WzVt9Xhz1vSYa2hqYxvSbWe19IGhzYbXjhA9WR6Yq6j17UIgFr0xY3T/xfYBtSf7cWE FdL7pkw9X5yZh/RNekkIl8+c6pa7x+8A6C0ul1m2NEv6b95ilZRArbuhqJxub4/mGXRM FXLgBJOb+1z+nkp+ctn6m7QgXWHT27CiZ20dKJ9KFw8DG62NduQFwluy+Z474WWowjJX gPb6N222kfkNh5f8d++x5hZsj+6ccsdtdLuHQLnc/kPEFSxJwiZBzVjkFY7ZGLwmCQ0q BqmA== X-Forwarded-Encrypted: i=1; AJvYcCUgpcY6CnodisCmE2jj0KjhSRK4Wuz9aM8hsHTMZIIp0AHbp5Is1K1JCckKQyfLgwPEup8COR+Pi7YgEyilG4tLy0bzSQ== X-Gm-Message-State: AOJu0YwPS/gwWFxa7gGwoGynSWd08/oGvNCT2f27U0NRYOVohI8wDlIo yvdg7J+K4vNjBS6ZRWhjsh4eIZw2x1DDVZH+LB7aQxXoXX9Un5tv6aJZ3E9u+OY= X-Received: by 2002:a5d:588b:0:b0:33d:d96b:2614 with SMTP id n11-20020a5d588b000000b0033dd96b2614mr2550414wrf.54.1708968388791; Mon, 26 Feb 2024 09:26:28 -0800 (PST) Received: from lion.localdomain (host-92-17-96-232.as13285.net. [92.17.96.232]) by smtp.gmail.com with ESMTPSA id bt1-20020a056000080100b0033d9c7eb63csm9142256wrb.84.2024.02.26.09.26.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Feb 2024 09:26:28 -0800 (PST) From: Caleb Connolly Date: Mon, 26 Feb 2024 17:26:11 +0000 Subject: [PATCH v5 07/39] serial: msm: add debug UART MIME-Version: 1.0 Message-Id: <20240226-b4-qcom-common-target-v5-7-10c8e078befb@linaro.org> References: <20240226-b4-qcom-common-target-v5-0-10c8e078befb@linaro.org> In-Reply-To: <20240226-b4-qcom-common-target-v5-0-10c8e078befb@linaro.org> To: Neil Armstrong , Sumit Garg , Ramon Fried , Dzmitry Sankouski , Caleb Connolly , Peng Fan , Jaehoon Chung , Rayagonda Kokatanur , Lukasz Majewski , Sean Anderson , Jorge Ramirez-Ortiz , Stephan Gerhold Cc: Marek Vasut , u-boot@lists.denx.de X-Mailer: b4 0.13-dev-4bd13 X-Developer-Signature: v=1; a=openpgp-sha256; l=2725; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=DTL9xs/a1a+3CQMGSxdYloLxj2TEW0WrylD20y7MFKA=; b=owGbwMvMwCFYaeA6f6eBkTjjabUkhtQ7J3cGff9hojFTcvXb7cwH9k9eGOiSYPl1j9o3WSWts 5WdV8WvdJSyMAhyMMiKKbKIn1hm2bT2sr3G9gUXYOawMoEMYeDiFICJOO1hZJhXbVe0eOtJ1lO7 mX2bSmYm1z45pi9RwX5MfOaD3l3WAvWMDNPeXjnze/fN3F0BT3MfSP9pDQ2bfVKnrXi5566TvJ/ 2MzYDAA== X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Introduce support for early debugging. This relies on the previous stage bootloader to initialise the UART clocks, when running with U-Boot as the primary bootloader this feature doesn't work. It will require a way to configure the clocks before the driver model is available. Reviewed-by: Neil Armstrong Signed-off-by: Caleb Connolly Reviewed-by: Sumit Garg --- drivers/serial/Kconfig | 8 ++++++++ drivers/serial/serial_msm.c | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 26460c4e0cab..fbd351a47859 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -318,8 +318,16 @@ config DEBUG_UART_S5P Select this to enable a debug UART using the serial_s5p driver. You will need to provide parameters to make this work. The driver will be available until the real driver-model serial is running. +config DEBUG_UART_MSM + bool "Qualcomm QUP UART debug" + depends on ARCH_SNAPDRAGON + help + Select this to enable a debug UART using the serial_msm driver. You + will need to provide parameters to make this work. The driver will + be available until the real driver-model serial is running. + config DEBUG_UART_MSM_GENI bool "Qualcomm snapdragon" depends on ARCH_SNAPDRAGON help diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index f4d96313b931..44b93bd7ff21 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -251,4 +251,41 @@ U_BOOT_DRIVER(serial_msm) = { .priv_auto = sizeof(struct msm_serial_data), .probe = msm_serial_probe, .ops = &msm_serial_ops, }; + +#ifdef CONFIG_DEBUG_UART_MSM + +static struct msm_serial_data init_serial_data = { + .base = CONFIG_VAL(DEBUG_UART_BASE), + .clk_rate = 7372800, +}; + +#include + +/* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */ +//int apq8016_clk_init_uart(phys_addr_t gcc_base); + +static inline void _debug_uart_init(void) +{ + /* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */ + //apq8016_clk_init_uart(0x1800000); + uart_dm_init(&init_serial_data); +} + +static inline void _debug_uart_putc(int ch) +{ + struct msm_serial_data *priv = &init_serial_data; + + while (!(readl(priv->base + UARTDM_SR) & UARTDM_SR_TX_EMPTY) && + !(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY)) + ; + + writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR); + + writel(1, priv->base + UARTDM_NCF_TX); + writel(ch, priv->base + UARTDM_TF); +} + +DEBUG_UART_FUNCS + +#endif