deleted file mode 100644
@@ -1,23 +0,0 @@
-/*
- * This header provides constants for AT91 pmc status.
- *
- * The constants defined in this header are being used in dts.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef _DT_BINDINGS_CLK_AT91_H
-#define _DT_BINDINGS_CLK_AT91_H
-
-#define AT91_PMC_MOSCS 0 /* MOSCS Flag */
-#define AT91_PMC_LOCKA 1 /* PLLA Lock */
-#define AT91_PMC_LOCKB 2 /* PLLB Lock */
-#define AT91_PMC_MCKRDY 3 /* Master Clock */
-#define AT91_PMC_LOCKU 6 /* UPLL Lock */
-#define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */
-#define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */
-#define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */
-#define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */
-#define AT91_PMC_GCKRDY 24 /* Generated Clocks */
-
-#endif
deleted file mode 100644
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
-/*
- * Daire McNamara,<daire.mcnamara@microchip.com>
- * Copyright (C) 2020-2022 Microchip Technology Inc. All rights reserved.
- */
-
-#ifndef _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_
-#define _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_
-
-#define CLK_CPU 0
-#define CLK_AXI 1
-#define CLK_AHB 2
-
-#define CLK_ENVM 3
-#define CLK_MAC0 4
-#define CLK_MAC1 5
-#define CLK_MMC 6
-#define CLK_TIMER 7
-#define CLK_MMUART0 8
-#define CLK_MMUART1 9
-#define CLK_MMUART2 10
-#define CLK_MMUART3 11
-#define CLK_MMUART4 12
-#define CLK_SPI0 13
-#define CLK_SPI1 14
-#define CLK_I2C0 15
-#define CLK_I2C1 16
-#define CLK_CAN0 17
-#define CLK_CAN1 18
-#define CLK_USB 19
-#define CLK_RESERVED 20
-#define CLK_RTC 21
-#define CLK_QSPI 22
-#define CLK_GPIO0 23
-#define CLK_GPIO1 24
-#define CLK_GPIO2 25
-#define CLK_DDRC 26
-#define CLK_FIC0 27
-#define CLK_FIC1 28
-#define CLK_FIC2 29
-#define CLK_FIC3 30
-#define CLK_ATHENA 31
-#define CLK_CFM 32
-
-#define CLK_RTCREF 33
-#define CLK_MSSPLL 34
-
-/* Clock Conditioning Circuitry Clock IDs */
-
-#define CLK_CCC_PLL0 0
-#define CLK_CCC_PLL1 1
-#define CLK_CCC_DLL0 2
-#define CLK_CCC_DLL1 3
-
-#define CLK_CCC_PLL0_OUT0 4
-#define CLK_CCC_PLL0_OUT1 5
-#define CLK_CCC_PLL0_OUT2 6
-#define CLK_CCC_PLL0_OUT3 7
-
-#define CLK_CCC_PLL1_OUT0 8
-#define CLK_CCC_PLL1_OUT1 9
-#define CLK_CCC_PLL1_OUT2 10
-#define CLK_CCC_PLL1_OUT3 11
-
-#define CLK_CCC_DLL0_OUT0 12
-#define CLK_CCC_DLL0_OUT1 13
-
-#define CLK_CCC_DLL1_OUT0 14
-#define CLK_CCC_DLL1_OUT1 15
-
-#endif /* _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_ */
deleted file mode 100644
@@ -1,52 +0,0 @@
-/*
- * This header provides macros for at91 dma bindings.
- *
- * Copyright (C) 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
- *
- * GPLv2 only
- */
-
-#ifndef __DT_BINDINGS_AT91_DMA_H__
-#define __DT_BINDINGS_AT91_DMA_H__
-
-/* ---------- HDMAC ---------- */
-
-/*
- * Source and/or destination peripheral ID
- */
-#define AT91_DMA_CFG_PER_ID_MASK (0xff)
-#define AT91_DMA_CFG_PER_ID(id) (id & AT91_DMA_CFG_PER_ID_MASK)
-
-/*
- * FIFO configuration: it defines when a request is serviced.
- */
-#define AT91_DMA_CFG_FIFOCFG_OFFSET (8)
-#define AT91_DMA_CFG_FIFOCFG_MASK (0xf << AT91_DMA_CFG_FIFOCFG_OFFSET)
-#define AT91_DMA_CFG_FIFOCFG_HALF (0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* half FIFO (default behavior) */
-#define AT91_DMA_CFG_FIFOCFG_ALAP (0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* largest defined AHB burst */
-#define AT91_DMA_CFG_FIFOCFG_ASAP (0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET) /* single AHB access */
-
-
-/* ---------- XDMAC ---------- */
-#define AT91_XDMAC_DT_MEM_IF_MASK (0x1)
-#define AT91_XDMAC_DT_MEM_IF_OFFSET (13)
-#define AT91_XDMAC_DT_MEM_IF(mem_if) (((mem_if) & AT91_XDMAC_DT_MEM_IF_MASK) \
- << AT91_XDMAC_DT_MEM_IF_OFFSET)
-#define AT91_XDMAC_DT_GET_MEM_IF(cfg) (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
- & AT91_XDMAC_DT_MEM_IF_MASK)
-
-#define AT91_XDMAC_DT_PER_IF_MASK (0x1)
-#define AT91_XDMAC_DT_PER_IF_OFFSET (14)
-#define AT91_XDMAC_DT_PER_IF(per_if) (((per_if) & AT91_XDMAC_DT_PER_IF_MASK) \
- << AT91_XDMAC_DT_PER_IF_OFFSET)
-#define AT91_XDMAC_DT_GET_PER_IF(cfg) (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
- & AT91_XDMAC_DT_PER_IF_MASK)
-
-#define AT91_XDMAC_DT_PERID_MASK (0x7f)
-#define AT91_XDMAC_DT_PERID_OFFSET (24)
-#define AT91_XDMAC_DT_PERID(perid) (((perid) & AT91_XDMAC_DT_PERID_MASK) \
- << AT91_XDMAC_DT_PERID_OFFSET)
-#define AT91_XDMAC_DT_GET_PERID(cfg) (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
- & AT91_XDMAC_DT_PERID_MASK)
-
-#endif /* __DT_BINDINGS_AT91_DMA_H__ */
deleted file mode 100644
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides macros for AT91 USART DT bindings.
- *
- * Copyright (C) 2018 Microchip Technology
- *
- * Author: Radu Pirea <radu.pirea@microchip.com>
- *
- */
-
-#ifndef __DT_BINDINGS_AT91_USART_H__
-#define __DT_BINDINGS_AT91_USART_H__
-
-#define AT91_USART_MODE_SERIAL 0
-#define AT91_USART_MODE_SPI 1
-
-#endif /* __DT_BINDINGS_AT91_USART_H__ */
deleted file mode 100644
@@ -1,21 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _DT_BINDINGS_MICROCHIP_LAN78XX_H
-#define _DT_BINDINGS_MICROCHIP_LAN78XX_H
-
-/* LED modes for LAN7800/LAN7850 embedded PHY */
-
-#define LAN78XX_LINK_ACTIVITY 0
-#define LAN78XX_LINK_1000_ACTIVITY 1
-#define LAN78XX_LINK_100_ACTIVITY 2
-#define LAN78XX_LINK_10_ACTIVITY 3
-#define LAN78XX_LINK_100_1000_ACTIVITY 4
-#define LAN78XX_LINK_10_1000_ACTIVITY 5
-#define LAN78XX_LINK_10_100_ACTIVITY 6
-#define LAN78XX_DUPLEX_COLLISION 8
-#define LAN78XX_COLLISION 9
-#define LAN78XX_ACTIVITY 10
-#define LAN78XX_AUTONEG_FAULT 12
-#define LAN78XX_FORCE_LED_OFF 14
-#define LAN78XX_FORCE_LED_ON 15
-
-#endif
deleted file mode 100644
@@ -1,49 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * This header provides constants for most at91 pinctrl bindings.
- *
- * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- */
-
-#ifndef __DT_BINDINGS_AT91_PINCTRL_H__
-#define __DT_BINDINGS_AT91_PINCTRL_H__
-
-#define AT91_PINCTRL_NONE (0 << 0)
-#define AT91_PINCTRL_PULL_UP (1 << 0)
-#define AT91_PINCTRL_MULTI_DRIVE (1 << 1)
-#define AT91_PINCTRL_DEGLITCH (1 << 2)
-#define AT91_PINCTRL_PULL_DOWN (1 << 3)
-#define AT91_PINCTRL_DIS_SCHMIT (1 << 4)
-#define AT91_PINCTRL_OUTPUT (1 << 7)
-#define AT91_PINCTRL_OUTPUT_VAL(x) ((x & 0x1) << 8)
-#define AT91_PINCTRL_SLEWRATE (1 << 9)
-#define AT91_PINCTRL_DEBOUNCE (1 << 16)
-#define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17)
-
-#define AT91_PINCTRL_PULL_UP_DEGLITCH (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DEGLITCH)
-
-#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT (0x0 << 5)
-#define AT91_PINCTRL_DRIVE_STRENGTH_LOW (0x1 << 5)
-#define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5)
-#define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5)
-
-#define AT91_PINCTRL_SLEWRATE_DIS (0x0 << 9)
-#define AT91_PINCTRL_SLEWRATE_ENA (0x1 << 9)
-
-#define AT91_PIOA 0
-#define AT91_PIOB 1
-#define AT91_PIOC 2
-#define AT91_PIOD 3
-#define AT91_PIOE 4
-
-#define AT91_PERIPH_GPIO 0
-#define AT91_PERIPH_A 1
-#define AT91_PERIPH_B 2
-#define AT91_PERIPH_C 3
-#define AT91_PERIPH_D 4
-
-#define ATMEL_PIO_DRVSTR_LO 1
-#define ATMEL_PIO_DRVSTR_ME 2
-#define ATMEL_PIO_DRVSTR_HI 3
-
-#endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */
deleted file mode 100644
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_BINDINGS_MICROCHIP_PDMC_H__
-#define __DT_BINDINGS_MICROCHIP_PDMC_H__
-
-/* PDM microphone's pin placement */
-#define MCHP_PDMC_DS0 0
-#define MCHP_PDMC_DS1 1
-
-/* PDM microphone clock edge sampling */
-#define MCHP_PDMC_CLK_POSITIVE 0
-#define MCHP_PDMC_CLK_NEGATIVE 1
-
-#endif /* __DT_BINDINGS_MICROCHIP_PDMC_H__ */
Drop in favour of dts/upstream Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> --- include/dt-bindings/clock/at91.h | 23 -------- include/dt-bindings/clock/microchip-mpfs-clock.h | 71 ------------------------ include/dt-bindings/dma/at91.h | 52 ----------------- include/dt-bindings/mfd/at91-usart.h | 17 ------ include/dt-bindings/net/microchip-lan78xx.h | 21 ------- include/dt-bindings/pinctrl/at91.h | 49 ---------------- include/dt-bindings/sound/microchip,pdmc.h | 13 ----- 7 files changed, 246 deletions(-)