From patchwork Tue Oct 31 10:51:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 117533 Delivered-To: patch@linaro.org Received: by 10.80.245.45 with SMTP id t42csp3793183edm; Tue, 31 Oct 2017 03:52:30 -0700 (PDT) X-Google-Smtp-Source: ABhQp+QkaHxrIGGw80dadwXbyTwFvDL+nxPa5SDWInEYMGUxEVpv7lz4Pw/G5Q/ue9hTuYqwMpkd X-Received: by 10.101.64.198 with SMTP id u6mr1463887pgp.44.1509447150625; Tue, 31 Oct 2017 03:52:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509447150; cv=none; d=google.com; s=arc-20160816; b=dBuJ89jqzsCIC2q6Z8HaokeOdubK/WEXk6g4jpBjiKcz44H6iC7PFC4ktPdsOBN4t6 kusdBuuBVTyq93QKrmOzaGSwmz21Yoz8rr3mrx5HMgMYbGCoR04tsvj8ztDs658gJLG5 kzMsz6zTJElyppnJ/ffPPC1DeMbVe0ahI1JLwJLmg1HvBiwNW5jy+0qtQ5V6t6ggdpUJ ZOYXoAQHZTvm5QvLG3mDhe0+iPHLEmHtCxFIpXDF2F8buFm+hVL48EwVUBjwpUecgW2N qUvrFyP0ceUG7iAkuwu1ng7m3HLY1GajLOQQby1/ga2zW6Ng0z/FRxhW7o4oA18hn1Qm gnHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:dkim-signature :delivered-to:arc-authentication-results; bh=9pTSGe3sQzbTSulPvGH+bgJ1mokYdX90huK8xw5ZSAc=; b=eJLJH6Zqm3AnBJrJaHBxkYTIAMEufIHeVFzLQ7fcFX7JegXawaQIZXFj6MuJBrkS2O Yn2Iy5TYY9o5BCxSUK07p5CsE6JkzLruqCceu8GeqCW1/5E4cBmsg/VzSO25tFRb5ljX CcBSsC4Qr9VTBlRH/zCE7JrWd1RCNZRyNsZUeYeGi8gnP04jHkmN/yt0mWeSjExX31gH BoUwreCmlp/N1Z4BL9EcQIPK4VBMxNGn0BjylZH4f3vRbQPJ4A0Hmwzbb32WraJGqdrx tHDY0HNnDyhsk0X3RP/RocjKOl1vr4Ly1P97YSaAPQV3UvdI8+nK+e6qHPe1nRkcVrhn ZSRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Eb07LT1L; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id b89si1257855plb.556.2017.10.31.03.52.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Oct 2017 03:52:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Eb07LT1L; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 59BA02034AB35; Tue, 31 Oct 2017 03:48:38 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::22f; helo=mail-wm0-x22f.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x22f.google.com (mail-wm0-x22f.google.com [IPv6:2a00:1450:400c:c09::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D7A252034AB1B for ; Tue, 31 Oct 2017 03:48:36 -0700 (PDT) Received: by mail-wm0-x22f.google.com with SMTP id r68so22225753wmr.3 for ; Tue, 31 Oct 2017 03:52:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=NqOD0KMjUVyU2rgzlmFBzBKcpSERb8ItWBA2oeekAZ8=; b=Eb07LT1LFEYBWJ+1jMOIAx4cD/3Ufvs3981i+QeFKNIUDYCQ8fPJ4tB09iWjlWsHgm L3Nh7Yrue3pWGiSsmHUbHfI3L1Kf7PbY6yjTEXaVHS9MNJyqF5TrdOkWVhIF6GMcgv5V 0ylbCOiMw3PxV2za7aUa+tJrEHFwUQcJDPfHs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=NqOD0KMjUVyU2rgzlmFBzBKcpSERb8ItWBA2oeekAZ8=; b=q8FV3NfUY1WiW6U1V8smcbRBEqOlYyvE43iULFFE1Mz7nh/NFpsbVhdsadg4yWGwmk JTMJhssA+9d47CvxL+d9ZqxXQ6m/LPstk1RHdrvNptJ302wV7GLGxeAhkQPtYv3RDXKY 4omI0QquP/xMgJ8uybOAvtmz8Hqm5olAeAStNqUsPpKVps0eJLbxBO1u2F5MhceITwGM diBMwAzAR+n2WSvShciNEa5AH87UpdV01OSOzvjat/Yw3PoPSR0l77LdE5PV3C8zKCTx ykdwvTZ1JfbV7DEYHKESy4O7nApt4pZau2W1vbFtq17aGe2swiO3hPwDwdpIARelC6Ei +KMw== X-Gm-Message-State: AMCzsaXCZD5wiafAYH5qaTfsz5u9WKI+DxRA98M5FoUo2CoGg273Y5fN FQ9un75zo3Oc/y6mWeg95fJtBfWDGrU= X-Received: by 10.28.15.5 with SMTP id 5mr1616419wmp.43.1509447146262; Tue, 31 Oct 2017 03:52:26 -0700 (PDT) Received: from localhost.localdomain ([105.129.222.2]) by smtp.gmail.com with ESMTPSA id o14sm460985wra.54.2017.10.31.03.52.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 31 Oct 2017 03:52:25 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Tue, 31 Oct 2017 10:51:51 +0000 Message-Id: <20171031105218.30208-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 Subject: [edk2] [PATCH edk2-platforms v3 00/27] add support for Socionext Synquacer X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: daniel.thompson@linaro.org, masami.hiramatsu@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" This adds support for the Socionext Synquacer SC2A11 evaluation board and revision 0.1 of the Developer Box. It implements support for the core peripherals (CPU, GIC, serial), and for the two PCIe RCs present on this board. (Note that the EVB requires PCI slot CN2 to be populated or it will not boot). Both ACPI and DT hardware descriptions are provided. In ACPI mode, Debian stretch can be booted and installed on PCIe based peripherals, and requires a PCIe based network card that already has upstream support. (On the Developer box, only the x16 slot is supported in this case) The DT description contains references to drivers that are not upstream yet, and will be merged into Linux v4.15 at the earliest. No other OS support is currently planned (as far as I am aware) The non-volatile EFI variable store is backed by the SPI NOR flash, which is therefore not exposed to the OS. Note that it occupies the 'devtree' partition, which must be wiped before use. A driver for the NETSEC network interface is included, which means network boot is supported as well. (Note that this driver deviates in coding style. This code is based on the platform independent driver provided by Socionext, and making cosmetic changes to it will only make it more difficult to track upstream changes) Changes since v2: - converted NETSEC driver to UEFI driver model - added a platform DXE driver that declares the non-discoverable NETSEC device for the UEFI driver model driver to bind to - remove hardcoded DRAM information - everything is now retrieved from ARM Trusted Firmware - added DT descriptions of the GPIO and interrupt controller IP blocks - addressed various style issues and merge errors highlighted by Leif Notably unchanged: - the SPI NOR driver - I simply don't have the information to convert it to using symbolic constants Notable gaps in functionality: - no support yet for the I2C RTC on the Developer box Ard Biesheuvel (26): Silicon/SynQuacer: add package with platform headers Silicon/Socionext: add driver for NETSEC network controller Silicon/Socionext: add PlatformPeilib implementation for SynQuacer Silicon/SynQuacer: implement a platform DXE driver Silicon/SynQuacer: add MemoryInitPeiLib implementation Platform: add support for Socionext SynQuacer eval board Silicon/SynQuacer: implement PciSegmentLib to support dual RCs Silicon/SynQuacer: implement PciHostBridgeLib support Silicon/SynQuacer: implement EFI_CPU_IO2_PROTOCOL Platform/SynQuacerEvalBoard: add PCI support Platform/SynQuacerEvalBoard: add NETSEC driver Silicon/SynQuacer: add ACPI support Silicon/SynQuacer: add device tree support for eval board Silicon/SynQuacer: add NorFlashPlatformLib implementation Platform/SynQuacer: incorporate NOR flash and variable drivers Silicon/SynQuacer: implement PlatformFlashAccessLib SynQuacer/SynQuacerMemoryInitPeiLib: add capsule support Socionext/SynQuacerEvalBoard: wire up basic capsule support Socionext/SynQuacerEvalBoard: switch to execute in place Platform/SynQuacerEvalBoard: add signed capsule update support Silicon/SynQuacer/AcpiTables: hide PCI domain #0 Silicon/SynQuacerPciHostBridgeLib: add workaround to support 32-bit only cards Platform/Socionext: add support for Socionext Developer Box rev 0.1 Platform/DeveloperBox: add ConsolePrefDxe driver Silicon/SynQuacer: add description of GPIO block to device tree Silicon/SynQuacer: add description of EXIU to the device tree Pipat Methavanitpong (1): Silicon/Socionext: add driver for SPI NOR flash Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 637 +++++++++ Platform/Socionext/DeveloperBox/DeveloperBox.fdf | 492 +++++++ Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 80 ++ Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 46 + Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 68 + Platform/Socionext/DeveloperBox/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 25 + Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 608 ++++++++ Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 475 +++++++ Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 80 ++ Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 46 + Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 68 + Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 25 + Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl | 294 ++++ Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.h | 58 + Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 62 + Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 167 +++ Silicon/Socionext/SynQuacer/AcpiTables/Fadt.aslc | 89 ++ Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc | 98 ++ Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc | 164 +++ Silicon/Socionext/SynQuacer/AcpiTables/Madt.aslc | 152 ++ Silicon/Socionext/SynQuacer/AcpiTables/Mcfg.aslc | 63 + Silicon/Socionext/SynQuacer/AcpiTables/Spcr.aslc | 127 ++ Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts | 71 + Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.inf | 33 + Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 535 +++++++ Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts | 71 + Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.inf | 33 + Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006Dxe.dec | 31 + Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006Dxe.inf | 79 ++ Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006Reg.h | 244 ++++ Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashBlockIoDxe.c | 138 ++ Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashDxe.c | 1376 ++++++++++++++++++ Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashDxe.h | 314 +++++ Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashFvbDxe.c | 859 ++++++++++++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/ComponentName.c | 186 +++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/DriverBinding.c | 245 ++++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.c | 1056 ++++++++++++++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.dec | 46 + Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.h | 118 ++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.inf | 70 + Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_api.h | 736 ++++++++++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_basic_type.h | 45 + Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_version.h | 24 + Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_basic_access.c | 88 ++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_basic_access.h | 52 + Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_desc_ring_access.c | 1391 +++++++++++++++++++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_desc_ring_access_internal.h | 111 ++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_gmac_access.c | 1454 ++++++++++++++++++++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_internal.h | 210 +++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc.c | 1385 +++++++++++++++++++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc_internal.h | 38 + Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg.h | 219 +++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg_f_gmac_4mt.h | 222 +++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg_netsec.h | 368 +++++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/ogma_config.h | 25 + Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/pfdep.h | 263 ++++ Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/pfdep_uefi.c | 176 +++ Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 106 ++ Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 52 + Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c | 590 ++++++++ Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.inf | 50 + Silicon/Socionext/SynQuacer/Include/Platform/DramInfo.h | 30 + Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 60 + Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h | 63 + Silicon/Socionext/SynQuacer/Include/Ppi/DramInfo.h | 64 + Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c | 70 + Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacerLib.inf | 41 + Silicon/Socionext/SynQuacer/Library/SynQuacerLib/AArch64/SynQuacerHelper.S | 87 ++ Silicon/Socionext/SynQuacer/Library/SynQuacerLib/Arm/SynQuacerHelper.S | 87 ++ Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c | 125 ++ Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacerLib.inf | 43 + Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c | 250 ++++ Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf | 72 + Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.c | 225 +++ Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf | 50 + Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLibConstructor.c | 394 ++++++ Silicon/Socionext/SynQuacer/Library/SynQuacerPciSegmentLib/PciSegmentLib.c | 1398 +++++++++++++++++++ Silicon/Socionext/SynQuacer/Library/SynQuacerPciSegmentLib/SynQuacerPciSegmentLib.inf | 35 + Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c | 251 ++++ Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.inf | 38 + Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c | 161 +++ Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf | 53 + Silicon/Socionext/SynQuacer/SynQuacer.dec | 35 + 83 files changed, 20666 insertions(+) create mode 100644 Platform/Socionext/DeveloperBox/DeveloperBox.dsc create mode 100644 Platform/Socionext/DeveloperBox/DeveloperBox.fdf create mode 100644 Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc create mode 100644 Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf create mode 100644 Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c create mode 100644 Platform/Socionext/DeveloperBox/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini create mode 100644 Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc create mode 100644 Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf create mode 100644 Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc create mode 100644 Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf create mode 100644 Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c create mode 100644 Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/AcpiSsdtRootPci.asl create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.h create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Fadt.aslc create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Gtdt.aslc create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Iort.aslc create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Madt.aslc create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Mcfg.aslc create mode 100644 Silicon/Socionext/SynQuacer/AcpiTables/Spcr.aslc create mode 100644 Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts create mode 100644 Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.inf create mode 100644 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi create mode 100644 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts create mode 100644 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.inf create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006Dxe.dec create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006Dxe.inf create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/Fip006Reg.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashBlockIoDxe.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashDxe.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashDxe.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Fip006Dxe/NorFlashFvbDxe.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/ComponentName.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/DriverBinding.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.dec create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.inf create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_api.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_basic_type.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/include/ogma_version.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_basic_access.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_basic_access.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_desc_ring_access.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_desc_ring_access_internal.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_gmac_access.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_internal.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_misc_internal.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg_f_gmac_4mt.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/netsec_sdk/src/ogma_reg_netsec.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/ogma_config.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/pfdep.h create mode 100644 Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/netsec_for_uefi/pfdep_uefi.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf create mode 100644 Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c create mode 100644 Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.inf create mode 100644 Silicon/Socionext/SynQuacer/Include/Platform/DramInfo.h create mode 100644 Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h create mode 100644 Silicon/Socionext/SynQuacer/Include/Platform/Pcie.h create mode 100644 Silicon/Socionext/SynQuacer/Include/Ppi/DramInfo.h create mode 100644 Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer.c create mode 100644 Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacerLib.inf create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerLib/AArch64/SynQuacerHelper.S create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerLib/Arm/SynQuacerHelper.S create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacerLib.inf create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.inf create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.c create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLib.inf create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerPciHostBridgeLib/SynQuacerPciHostBridgeLibConstructor.c create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerPciSegmentLib/PciSegmentLib.c create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerPciSegmentLib/SynQuacerPciSegmentLib.inf create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.inf create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c create mode 100644 Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf create mode 100644 Silicon/Socionext/SynQuacer/SynQuacer.dec -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel