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[198.145.21.10]) by mx.google.com with ESMTPS id ba10-v6si21526932plb.228.2018.08.16.05.13.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 16 Aug 2018 05:13:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="iqcOeap/"; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 73C64210F30C0; Thu, 16 Aug 2018 05:13:00 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::442; helo=mail-pf1-x442.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AAFF721BADAB2 for ; Thu, 16 Aug 2018 05:12:58 -0700 (PDT) Received: by mail-pf1-x442.google.com with SMTP id a26-v6so1950551pfo.4 for ; Thu, 16 Aug 2018 05:12:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=zkiHuw0U1FO3T7IHjqaFXcnN/bfX/B6bZWy8mnvX9M8=; b=iqcOeap/qJDOE9sN0aUfhrsFg925nsRFwVE5wz9vPg6NTv7QcC43U6XlWu19swqISD lUdrh1DRud49Yt3UoGekVFACenkusxUsA2/tDseuiuUYpeYA7Sdi/GbnsMh2uKNdeA+9 6scvIG3ZCiUo1opa5v0FXB2XxEkrO0FyyIVR0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=zkiHuw0U1FO3T7IHjqaFXcnN/bfX/B6bZWy8mnvX9M8=; b=CgpHwgofyEUHkOURpLwVJOqm5niyOzT7Ym9j+p+aVkTd5B8FIDaJXrZ2IulNsHrUXY XCrJXrjLFp6tanhdfcBa2JBvVLRgyqd4lc9em5G8kcmXqtiRDR4Tth8AAHla5uJFLvck RVOga0St5/+ItPB21vw94DMxaTYlESnEpZwixDncjMljrZlULVQrCo5bL60u5u7/Ljek 8Awm7Lxv5tIZANddXd+T6Y2GlKyawtPJoyyal5930l1/CsOSOaDEuXLJfVPFwH3CopQ5 uerJPnpJJYuSnjE/XNu86FCRSkFRLkHl/25iVyBn8pVHlb6Zzfk7SDdQEOqEmNqIQ1W+ TU4w== X-Gm-Message-State: AOUpUlF4rwph4m4ToJ0+RXe0pLqz9n97M5u5fushbmKrzaPs3+njF2Hm k0jZFnT839F2Y6akEljHFGq2YA== X-Received: by 2002:a63:cb04:: with SMTP id p4-v6mr28129210pgg.197.1534421577749; Thu, 16 Aug 2018 05:12:57 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j27-v6sm46736311pfj.91.2018.08.16.05.12.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 16 Aug 2018 05:12:56 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 16 Aug 2018 20:12:03 +0800 Message-Id: <20180816121239.44129-1-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 Subject: [edk2] [PATCH edk2-platforms v3 00/36] Upload for D06 platform X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, huangdaode@hisilicon.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The major features of this patchset include: 1 D06 source code; 2 Unify some D0x modules; This patch set is base on pcihostbridage-v2. For compiling D06, add below hunk to edk2-platforms.config [d06] LONGNAME=HiSilicon D06 DSC=Platform/Hisilicon/D06/D06.dsc ARCH=AARCH64 Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git branch: d06-platform-v3 Heyi Guo (3): Hisilicon/D06: Add Debug Serial Port Init Driver Hisilicon/Hi1620: Add ACPI PPTT table Platform/Hisilicon/D06: Enable ACPI PPTT Luqi Jiang (1): Hisilicon/D06: add apei driver Ming Huang (27): Hisilicon/D0x: Unify FlashFvbDxe driver Hisilicon/D0X: Rename the global variable gDS3231RtcDevice Hisilicon/D06: Add several base file for D06 Platform/Hisilicon/D06: Add M41T83RealTimeClockLib Platform/Hisilicon/D06: Add edk2-non-osi components for D06 Hisilicon/D06: Add OemMiscLibD06 Silicon/Hisilicon/D06: Wait for all disk ready Silicon/Hisilicon/Acpi: Unify HisiAcipPlatformDxe Hisilicon/D06: Add ACPI Tables for D06 Silicon/Hisilicon/D06: Stop watchdog Hisilicon/I2C: Modify I2CLib.c for coding style Silicon/Hisilicon/I2C: Refactor I2C library Silicon/Hisilicon/D06: Fix I2C enable fail issue for D06 Silicon/Hisilicon/D06: Add I2C delay for HNS auto config Hisilicon/I2C: Fix a typo issue Platform/Hisilicon/D06: Add OemNicLib Platform/Hisilicon/D06: Add OemNicConfig2P Driver Platform/Hisilicon/D06: Add EarlyConfigPeim peim Platform/Hisilicon/D06: Add PciHostBridgeLib Silicon/Hisilicon/D06: Add some Lpc macro to LpcLib.h Platform/Hisilicon/D06: Add capsule upgrade support Silicon/Hisilicon/D06: Add I2C Bus Exception handle function Silicon/Hisilicon/Setup: Support SPCR table switch Silicon/Hisilicon/setup: Support SMMU switch Hisilicon/D06: Add PciPlatformLib Hisilicon/D06: Add edk2-non-osi Shell components Platform/Hisilicon/D0x: Update version string to 18.08 Sun Yuanchen (1): Hisilicon/D0x: Update SMBIOS type9 info Yang XinYi (2): Hisilicon/D06: Add Hi1620OemConfigUiLib Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP" ZhenYao (1): Silicon/Hisilicon/D06: Modify for close slave core clock. shaochangliang (1): Silicon/Hisilicon/D06: Optimize HNS config CDR post time Platform/Hisilicon/D06/D06.dec | 29 + Silicon/Hisilicon/HisiPkg.dec | 6 + Platform/Hisilicon/D03/D03.dsc | 2 +- Platform/Hisilicon/D05/D05.dsc | 2 +- Platform/Hisilicon/D06/D06.dsc | 490 + Platform/Hisilicon/D03/D03.fdf | 6 +- Platform/Hisilicon/D05/D05.fdf | 6 +- Platform/Hisilicon/D06/D06.fdf | 444 + .../OemMiscLib2P/OemMiscLib2PHi1610.inf | 1 + .../Library/OemMiscLibD05/OemMiscLibD05.inf | 1 + .../OemNicConfig2PHi1620/OemNicConfig2P.inf | 43 + .../SystemFirmwareDescriptor.inf | 50 + .../EarlyConfigPeim/EarlyConfigPeimD06.inf | 50 + .../Library/OemMiscLibD06/OemMiscLibD06.inf | 51 + .../D06/Library/OemNicLib/OemNicLib.inf | 35 + .../PciHostBridgeLib/PciHostBridgeLib.inf | 36 + .../Drivers/FlashFvbDxe/FlashFvbDxe.inf | 7 +- .../HisiAcpiPlatformDxe/AcpiPlatformDxe.inf | 3 +- .../ProcessorSubClassDxe.inf | 2 + .../Hisilicon/Hi1620/Drivers/Apei/Apei.inf | 59 + .../Pl011DebugSerialPortInitDxe.inf | 48 + .../Hi1620AcpiTables/AcpiTablesHi1620.inf | 59 + .../Hi1620OemConfigUiLib/OemConfigUiLib.inf | 68 + .../Hi1620PciPlatformLib.inf | 30 + Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf | 48 + .../M41T83RealTimeClockLib.inf | 46 + .../PlatformBootManagerLib.inf | 4 + .../OemNicConfig2PHi1620/OemNicConfig.h | 25 + .../Hisilicon/D06/Include/Library/CpldD06.h | 39 + .../Hisilicon/Hi1610/Include/PlatformArch.h | 6 + Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h | 41 + .../Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h | 43 + .../Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h | 146 + .../Hi1620/Drivers/Apei/ErrorSource/Ghes.h | 110 + .../Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h | 146 + .../Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h | 59 + .../Hi1620/Drivers/Apei/OemApeiHi1620.h | 43 + .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 27 + .../Hi1620/Hi1620OemConfigUiLib/OemConfig.h | 142 + .../Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h | 64 + .../Hi1620/Include/Library/SerdesLib.h | 85 + .../Hisilicon/Hi1620/Include/PlatformArch.h | 67 + Silicon/Hisilicon/Hi1620/Pptt/Pptt.h | 68 + .../Hisilicon/Include/Library/AcpiNextLib.h | 31 +- .../Hisilicon/Include/Library/IpmiCmdLib.h | 16 + Silicon/Hisilicon/Include/Library/LpcLib.h | 51 +- .../Include/Library/OemAddressMapLib.h | 8 + .../Hisilicon/Include/Library/OemConfigData.h | 85 + .../Hisilicon/Include/Library/OemMiscLib.h | 9 +- Silicon/Hisilicon/Include/Library/OemNicLib.h | 57 + .../Include/Library/PlatformSysCtrlLib.h | 6 + .../Include/Protocol/PlatformSasNotify.h | 27 + Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 9 +- .../M41T83RealTimeClock.h | 158 + .../DS3231RealTimeClockLib.c | 8 +- .../OemMiscLib2P/BoardFeature2PHi1610.c | 2 +- .../Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 24 + .../Library/OemMiscLibD05/BoardFeatureD05.c | 2 +- .../D05/Library/OemMiscLibD05/OemMiscLibD05.c | 27 +- .../OemNicConfig2PHi1620/OemNicConfig2P.c | 71 + .../SystemFirmwareDescriptorPei.c | 70 + .../D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 107 + .../Library/OemMiscLibD06/BoardFeatureD06.c | 432 + .../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 209 + .../D06/Library/OemNicLib/OemNicLib.c | 570 + .../PciHostBridgeLib/PciHostBridgeLib.c | 635 + .../Drivers/FlashFvbDxe/FlashFvbDxe.c | 22 +- .../HisiAcpiPlatformDxe/UpdateAcpiTable.c | 114 +- .../Smbios/AddSmbiosType9/AddSmbiosType9.c | 14 +- Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 108 + .../Hisilicon/Hi1620/Drivers/Apei/Bert/bert.c | 92 + .../Hisilicon/Hi1620/Drivers/Apei/Einj/einj.c | 349 + .../Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 330 + .../Hisilicon/Hi1620/Drivers/Apei/Erst/erst.c | 374 + .../Hisilicon/Hi1620/Drivers/Apei/Hest/hest.c | 119 + .../Hi1620/Drivers/Apei/OemApeiHi1620.c | 337 + .../Pl011DebugSerialPortInitDxe.c | 64 + .../Hi1620/Hi1620OemConfigUiLib/OemConfig.c | 364 + .../Hi1620PciPlatformLib.c | 67 + Silicon/Hisilicon/Hi1620/Pptt/Pptt.c | 543 + .../DS3231RealTimeClockLib.c | 8 +- Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 975 +- .../M41T83RealTimeClockLib.c | 564 + .../PlatformBootManagerLib/PlatformBm.c | 59 + .../SystemFirmwareUpdateConfig.ini | 46 + .../SystemFirmwareDescriptor.aslc | 81 + .../OemMiscLibD06/BoardFeatureD06Strings.uni | 64 + .../Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl | 409 + .../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 30 + .../Hi1620AcpiTables/Dsdt/DsdtHi1620.asl | 35 + .../Hi1620AcpiTables/Dsdt/Hi1620Apei.asl | 93 + .../Hi1620AcpiTables/Dsdt/Hi1620Ged.asl | 58 + .../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 1459 +++ .../Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl | 41 + .../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 1216 ++ .../Hi1620AcpiTables/Dsdt/Hi1620Power.asl | 28 + .../Hi1620AcpiTables/Dsdt/Hi1620Rde.asl | 47 + .../Hi1620AcpiTables/Dsdt/Hi1620Sec.asl | 57 + .../Dsdt/Hi1620Socip4_i2c100k.asl | 249 + .../Dsdt/Hi1620Socip4_i2c400k.asl | 249 + .../Hi1620AcpiTables/Dsdt/LpcUart_clk.asl | 49 + .../Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl | 1658 +++ .../Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl | 49 + .../Hi1620/Hi1620AcpiTables/Facs.aslc | 67 + .../Hi1620/Hi1620AcpiTables/Fadt.aslc | 91 + .../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 86 + .../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 86 + .../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 1989 +++ .../Hi1620AcpiTables/Hi1620IortNoSmmu.asl | 1736 +++ .../Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc | 64 + .../Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc | 64 + .../Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc | 81 + .../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 166 + .../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 375 + .../Hi1620OemConfigUiLib/MemoryConfig.hfr | 154 + .../Hi1620OemConfigUiLib/MemoryConfig.uni | 103 + .../Hi1620OemConfigUiLib/MiscConfig.hfr | 48 + .../Hi1620OemConfigUiLib/MiscConfig.uni | 27 + .../Hi1620OemConfigUiLib/OemConfigUiLib.uni | 24 + .../OemConfigUiLibStrings.uni | 42 + .../Hi1620OemConfigUiLib/OemConfigVfr.Vfr | 89 + .../Hi1620OemConfigUiLib/PcieConfig.hfr | 219 + .../PcieConfigStrings.uni | 111 + .../Hi1620OemConfigUiLib/PciePortConfig.hfr | 167 + .../Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr | 172 + .../Hi1620/Hi1620OemConfigUiLib/RasConfig.uni | 85 + .../Hi1620OemConfigUiLib/iBMCConfig.hfr | 81 + .../Hi1620OemConfigUiLib/iBMCConfig.uni | 34 + v2/v2-0000-cover-letter.patch | 316 + ...icon-Modify-the-MRC-interface-for-ot.patch | 553 + ...on-Hisilicon-Separate-PlatformArch.h.patch | 64 + ...icon-Acpi-Move-some-macro-to-Platfor.patch | 168 + ...icon-D0x-Move-dimm-size-definition-t.patch | 57 + ...icon-D0x-Move-RAS-macro-to-PlatformA.patch | 68 + ...-Move-CustomData.Fv-to-common-path-o.patch | 45 + ...-Move-IpmiCmdLib-to-common-path-of-H.patch | 45 + ...silicon-D0x-Unify-FlashFvbDxe-driver.patch | 170 + ...-Rename-the-global-variable-gDS3231R.patch | 142 + ...on-D06-Add-several-base-file-for-D06.patch | 1160 ++ ...licon-D06-Add-M41T83RealTimeClockLib.patch | 818 ++ ...licon-D06-Add-edk2-non-osi-component.patch | 149 + ...0013-Hisilicon-D06-Add-OemMiscLibD06.patch | 751 ++ ...isilicon-D06-Wait-for-all-disk-ready.patch | 132 + ...licon-Acpi-Unify-HisiAcipPlatformDxe.patch | 126 + ...06-Add-Debug-Serial-Port-Init-Driver.patch | 172 + ...isilicon-D06-Add-ACPI-Tables-for-D06.patch | 10864 ++++++++++++++++ ...silicon-D06-Add-Hi1620OemConfigUiLib.patch | 2268 ++++ ...-Silicon-Hisilicon-D06-Stop-watchdog.patch | 125 + ...I2C-Modify-I2CLib.c-for-coding-style.patch | 1161 ++ ...n-Hisilicon-I2C-Refactor-I2C-library.patch | 302 + ...icon-D06-Fix-I2C-enable-fail-issue-f.patch | 55 + ...icon-D06-Add-I2C-delay-for-HNS-auto-.patch | 80 + ...-0024-Hisilicon-I2C-Fix-a-typo-issue.patch | 43 + ...icon-D06-Optimize-HNS-config-CDR-pos.patch | 44 + ...licon-Setup-Add-Setup-Item-EnableGOP.patch | 73 + ...Hisilicon-Hi1620-Add-ACPI-PPTT-table.patch | 701 + ...tform-Hisilicon-D06-Enable-ACPI-PPTT.patch | 41 + ...Platform-Hisilicon-D06-Add-OemNicLib.patch | 647 + ...ilicon-D06-Add-OemNicConfig2P-Driver.patch | 204 + ...silicon-D0x-Update-SMBIOS-type9-info.patch | 325 + ...silicon-D06-Add-EarlyConfigPeim-peim.patch | 227 + ...m-Hisilicon-D06-Add-PciHostBridgeLib.patch | 716 + ...2-0034-Hisilicon-D06-add-apei-driver.patch | 2508 ++++ ...icon-D06-Add-some-Lpc-macro-to-LpcLi.patch | 85 + ...licon-D06-Add-capsule-upgrade-suppor.patch | 434 + ...icon-D06-Modify-for-close-slave-core.patch | 33 + ...icon-D06-Add-I2C-Bus-Exception-handl.patch | 38 + ...icon-Setup-Support-SPCR-table-switch.patch | 84 + ...-Hisilicon-setup-Support-SMMU-switch.patch | 124 + ...041-Hisilicon-D06-Add-PciPlatformLib.patch | 141 + ...06-Add-edk2-non-osi-Shell-components.patch | 74 + ...licon-D0x-Update-version-string-to-1.patch | 62 + 172 files changed, 47754 insertions(+), 574 deletions(-) create mode 100644 Platform/Hisilicon/D06/D06.dec create mode 100644 Platform/Hisilicon/D06/D06.dsc create mode 100644 Platform/Hisilicon/D06/D06.fdf create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf create mode 100644 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf create mode 100644 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf create mode 100644 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf create mode 100644 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf create mode 100644 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h create mode 100644 Platform/Hisilicon/D06/Include/Library/CpldD06.h create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/bert.h create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/einj.h create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/erst.h create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/hest.h create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.h create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h create mode 100644 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