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[198.145.21.10]) by mx.google.com with ESMTPS id w23si7606781plq.198.2018.11.28.06.34.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 06:34:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="aX/qXWUk"; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 5C39221A00AE6; Wed, 28 Nov 2018 06:34:07 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::42e; helo=mail-wr1-x42e.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 73C4C21A02937 for ; Wed, 28 Nov 2018 06:34:06 -0800 (PST) Received: by mail-wr1-x42e.google.com with SMTP id r10so26512966wrs.10 for ; Wed, 28 Nov 2018 06:34:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=KDHtLx6q7xMXX+q86Ds0WRAi2lLSb9dvXW5Nde4Be7U=; b=aX/qXWUk8zQ/xv5Z9Ylsv3jNE2KEOdChkmSkD4wOxBZyH1aopaUs480zmri+nRImEU PCs7YpKiuXDk0mS3ChKl+6bsSkwojHIxHZdA/5eJyLdiFpYygkQ7aNTQ4OuRdChNu3q4 gxfuA4hsG1SeH1i3b3i4LiITOucGT0jVazW3k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=KDHtLx6q7xMXX+q86Ds0WRAi2lLSb9dvXW5Nde4Be7U=; b=P+BdbdxAEM0fIYKp3zhHxN0RuS1uegwgS72zJlI02tJgsVOPgdYD0zbRN3Q1GeYBWn Ce8vYGX649W7V5ohVy7LMw7vqPL7DarDG9aiNQxHAlnw3ZiBslKRtySwwjPDiBLbhjBB ANKm+LDZ77wuj8d6O4+rTzqToQqZj3MhWhMrvPaIOEn8QemkuS8q+En1J4vvdLKpkQGr DFrt6GwmMK0bVEsdwhDjhhkOPg/aFo5PbJPIafs/93Wn5tOWX6AQfEIAR7FWEwlWVu1B XLwTeRZbh+jzll78JoxxKjr1zI725h2ef0LcvAJjd51O9xuTf18ZJQXNzLm2h5zs8OfU eQPA== X-Gm-Message-State: AA+aEWZoOeZmqA10tiz0gxNglXGKksUCVJseadM1NCTW/kFS2S6aGaiK zlz1KDNYPGGAL/Xr79vObIq9stD91AE= X-Received: by 2002:adf:fb0d:: with SMTP id c13mr25678111wrr.285.1543415644076; Wed, 28 Nov 2018 06:34:04 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:296f:238b:c20d:3626]) by smtp.gmail.com with ESMTPSA id 6sm3391891wmk.26.2018.11.28.06.34.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 06:34:03 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 28 Nov 2018 15:33:41 +0100 Message-Id: <20181128143357.991-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Subject: [edk2] [PATCH v3 00/16] [Arm|ArmVirt|MdePkg|Embedded]Pkg: lift 40-bit IPA space limit X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Laszlo Ersek Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" This v3 subsumes and/or supersedes [PATCH v2 00/13] ArmPkg, ArmVirtPkg: lift 40-bit IPA space limit [PATCH] MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bits [PATCH v2 0/2] ArmVirtPkg: remove high peripheral space mapping The ArmVirtQemu targets currently limit the size of the IPA space to 40 bits because that is all what KVM supports. However, this is about to change, and so we need to update the code if we want to ensure that our UEFI firmware builds can keep running on systems that set values other than 40 (which could be > 40 or < 40) This series refactors how we handle the maximum size of the physical address space supported by the CPU in relation with the size of UEFI's 1:1 mapping and the size of the GCD memory space map, taking the following observations into account: - the range of the linear mapping can be tied to whatever the CPU supports (as long as it doesn't exceed what the architecture permits for 4k pages) since we mostly already use the maximum of 4 levels anyway, and there is no memory cost involved beyond that - there is usually no point in mapping the entire address space, which does involve a memory cost - the GCD memory space may be required to cover more than what UEFI can address itself, since it is the based for the UEFI memory map that is provided to the OS Patches #1 and #2 remove some unused code to avoid having to fix it. Patches #3 and #4 update ArmVirtQemu and ArmVirtQemuKernel to drop the high peripheral space mapping, and map whatever may reside there explicitly (currently only the ECAM space in practice, but the MMIO view of the PCI I/O space is mapped explicitly as well) Patch #5 was sent out before individually, and sets MAX_ADDRESS to the maximum value AArch64 can map in UEFI which runs with 4k pages. Patch #6 adds a helper to ArmLib to read the number of supported address bits and take this into account in the page table code (#8), which allows PcdPrePiCpuMemorySize to assume a value that exceeds the capabilities of the CPU. Patch #7 is mostly a cleanup patch, to switch to the new helper added in patch #6. No functional changes intended. Patches #9 to #12 modify building of the CPU hob (and thus the size of the GCD memory space) based on the CPU capabilities rather than the value of PcdPrePiCpuMemorySize, which is dropped in the last patch. Pacthes #13 and #14 remove some needless references to PcdPrePiCpuMemorySize Patch #15 drops the overrides of PcdPrePiCpuMemorySize from all ArmVirtPkg platforms. Cc: Laszlo Ersek Cc: Leif Lindholm Cc: Eric Auger Cc: Andrew Jones Cc: Philippe Mathieu-Daude Cc: Julien Grall Ard Biesheuvel (16): EmbeddedPkg/TemplateSec: remove unused module EmbeddedPkg/PrePiHobLib: drop CreateHobList() from library ArmVirtPkg/FdtPciHostBridgeLib: map ECAM and I/O spaces in GCD memory map ArmVirtPkg/QemuVirtMemInfoLib: remove 1:1 mapping of top of PA range MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bits ArmPkg/ArmLib: add support for reading the max physical address space size ArmVirtPkg/XenVirtMemInfoLib: refactor reading of the PA space size ArmPkg/ArmMmuLib: take the CPU supported maximum PA space into account ArmPkg/CpuPei: base GCD memory space size on CPU's PA range ArmPlatformPkg/PrePi: base GCD memory space size on CPU's PA range ArmVirtPkg/PrePi: base GCD memory space size on CPU's PA range BeagleBoardPkg/PrePi: base GCD memory space size on CPU's PA range ArmPlatformPkg/PlatformPei: drop unused PCD references EmbeddedPkg/PrePiLib: drop unused PCD reference ArmVirtPkg: drop PcdPrePiCpuMemorySize assignments from all platforms EmbeddedPkg/EmbeddedPkg.dec: drop PcdPrePiCpuMemorySize declarations EmbeddedPkg/EmbeddedPkg.dec | 4 - ArmVirtPkg/ArmVirt.dsc.inc | 3 - ArmVirtPkg/ArmVirtQemu.dsc | 4 - ArmVirtPkg/ArmVirtQemuKernel.dsc | 4 - ArmPkg/Drivers/CpuPei/CpuPei.inf | 1 - ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf | 3 - ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf | 3 - ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf | 3 - ArmPlatformPkg/PlatformPei/PlatformPeim.inf | 3 - ArmPlatformPkg/PrePi/PeiMPCore.inf | 1 - ArmPlatformPkg/PrePi/PeiUniCore.inf | 1 - .../FdtPciHostBridgeLib.inf | 1 + .../QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf | 7 -- .../QemuVirtMemInfoPeiLib.inf | 7 -- .../XenVirtMemInfoLib/XenVirtMemInfoLib.inf | 6 -- .../PrePi/ArmVirtPrePiUniCoreRelocatable.inf | 1 - BeagleBoardPkg/PrePi/PeiUniCore.inf | 1 - EmbeddedPkg/Library/PrePiLib/PrePiLib.inf | 1 - EmbeddedPkg/TemplateSec/TemplateSec.inf | 65 ---------------- ArmPkg/Include/Library/ArmLib.h | 6 ++ EmbeddedPkg/Include/Library/PrePiLib.h | 18 ----- MdePkg/Include/AArch64/ProcessorBind.h | 4 +- ArmPkg/Drivers/CpuPei/CpuPei.c | 2 +- .../Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 11 ++- ArmPlatformPkg/PrePi/PrePi.c | 2 +- .../FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 46 ++++++++++- .../QemuVirtMemInfoLib/QemuVirtMemInfoLib.c | 25 ++---- .../XenVirtMemInfoLib/XenVirtMemInfoLib.c | 11 ++- ArmVirtPkg/PrePi/PrePi.c | 2 +- BeagleBoardPkg/PrePi/PrePi.c | 2 +- EmbeddedPkg/Library/PrePiHobLib/Hob.c | 41 ---------- EmbeddedPkg/TemplateSec/TemplateSec.c | 76 ------------------- ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 17 +++++ ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S | 8 ++ ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm | 8 ++ .../QemuVirtMemInfoLib/AArch64/PhysAddrTop.S | 39 ---------- .../QemuVirtMemInfoLib/Arm/PhysAddrTop.S | 24 ------ .../XenVirtMemInfoLib/AArch64/PhysAddrTop.S | 39 ---------- .../XenVirtMemInfoLib/Arm/PhysAddrTop.S | 24 ------ 39 files changed, 110 insertions(+), 414 deletions(-) delete mode 100644 EmbeddedPkg/TemplateSec/TemplateSec.inf delete mode 100644 EmbeddedPkg/TemplateSec/TemplateSec.c delete mode 100644 ArmVirtPkg/Library/QemuVirtMemInfoLib/AArch64/PhysAddrTop.S delete mode 100644 ArmVirtPkg/Library/QemuVirtMemInfoLib/Arm/PhysAddrTop.S delete mode 100644 ArmVirtPkg/Library/XenVirtMemInfoLib/AArch64/PhysAddrTop.S delete mode 100644 ArmVirtPkg/Library/XenVirtMemInfoLib/Arm/PhysAddrTop.S -- 2.19.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel