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[198.145.21.10]) by mx.google.com with ESMTPS id yl8si8991871pab.245.2016.04.14.02.25.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Apr 2016 02:25:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id B018E1A1F04; Thu, 14 Apr 2016 02:25:10 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-ig0-x231.google.com (mail-ig0-x231.google.com [IPv6:2607:f8b0:4001:c05::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 72E551A1EE9 for ; Thu, 14 Apr 2016 02:25:09 -0700 (PDT) Received: by mail-ig0-x231.google.com with SMTP id g8so85221693igr.0 for ; Thu, 14 Apr 2016 02:25:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=cSA0HIiX7LURGKqwnrhwSMQiQyBXjenQCc0E/K/T+Z8=; b=Xc32tmcyzp2NJfNgp5lm/6p1lh1FQ7RoQ/tvB3+loPlfj8+UssZmQYLhZdNjSaRNOS 44bc1WqG7ZWsfoxws2L4M0VCnyUBHEc8xkUp+nun1R+urUHbAimBLRhV2uGqErYLYIuS q+aU5Y60SJXD4sCGKjy276KWrpL1YnFSFqEss= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=cSA0HIiX7LURGKqwnrhwSMQiQyBXjenQCc0E/K/T+Z8=; b=QtZn4xxO6X7mKoSGwnzdwYXzdgin+IwaIi2Hm9JME1MGiUqx2Z4hNZ5z2U6MKHMR/l HMEWUOedyzlupmK+JBsBd4AFIohnGxiVGExxtutLs2U9zFLKPmMogQbXPrUoajZ6zeft xSsD17XUkptg8UPYzM2d67L9m6JPuu3kzXAwapiz8uwOmruKjLxS+WpxkJodjM9Arbxz N1FjsAQlH37BCpkrEsW2aqHe4PscRyd9mh7SKIjQE1HAoXhZFc27DxlAqG1nP50k3LZX SIauy7DMrb/4T0PpY86rvWrrtCuqjmWCDY4E8sw+lZ23fZtSoIqQb+LbQ+BWgA7pzneO eyBw== X-Gm-Message-State: AD7BkJLuxR6nIM6f4aeFO9RbwEixtHD+olsPsvHw7MiLIbmWBdxuJMSUKTPCBK4KYR4fFR5T X-Received: by 10.50.56.110 with SMTP id z14mr34574689igp.7.1460625908665; Thu, 14 Apr 2016 02:25:08 -0700 (PDT) Received: from localhost.localdomain ([104.238.32.26]) by smtp.gmail.com with ESMTPSA id ip3sm2707544igb.14.2016.04.14.02.25.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 14 Apr 2016 02:25:08 -0700 (PDT) From: Heyi Guo To: edk2-devel@lists.01.org Date: Thu, 14 Apr 2016 17:24:47 +0800 Message-Id: <1460625887-8600-1-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 2.7.0 Subject: [edk2] [PATCH] ArmPkg: Fix XN attribute for device memory X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Heyi Guo , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Now XN attribute will be set automatically if the region is declared as device memory. However, the function ArmMemoryAttributeToPageAttribute is to get attribute for block and page descriptors, not for table descriptors, so attribute TT_TABLE_*XN does not really take effect. Need to use TT_*XN_MASK instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo Cc: Leif Lindholm Cc: Ard Biesheuvel --- ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.7.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ard Biesheuvel diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c index b7d23c6..918957d 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c @@ -51,9 +51,9 @@ ArmMemoryAttributeToPageAttribute ( case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE: case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE: if (ArmReadCurrentEL () == AARCH64_EL2) - return TT_ATTR_INDX_DEVICE_MEMORY | TT_TABLE_XN; + return TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK; else - return TT_ATTR_INDX_DEVICE_MEMORY | TT_TABLE_UXN | TT_TABLE_PXN; + return TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK; } }