diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c
index 50644e7..bef34c2 100644
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c
@@ -297,7 +297,7 @@ SnpInitialize (
   }
 
   // Read the PM register
-  PmConf = MmioRead32 (LAN9118_PMT_CTRL);
+  PmConf = Lan9118MmioRead32 (LAN9118_PMT_CTRL);
 
   // MPTCTRL_WOL_EN: Allow Wake-On-Lan to detect wake up frames or magic packets
   // MPTCTRL_ED_EN:  Allow energy detection to allow lowest power consumption mode
@@ -306,7 +306,7 @@ SnpInitialize (
   PmConf |= (MPTCTRL_WOL_EN | MPTCTRL_ED_EN | MPTCTRL_PME_EN);
 
   // Write the current configuration to the register
-  MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
+  Lan9118MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
   gBS->Stall (LAN9118_STALL);
   gBS->Stall (LAN9118_STALL);
 
@@ -359,7 +359,7 @@ SnpInitialize (
   }
 
   // Now acknowledge all interrupts
-  MmioWrite32 (LAN9118_INT_STS, ~0);
+  Lan9118MmioWrite32 (LAN9118_INT_STS, ~0);
 
   // Declare the driver as initialized
   Snp->Mode->State = EfiSimpleNetworkInitialized;
@@ -422,7 +422,7 @@ SnpReset (
   }
 
   // Read the PM register
-  PmConf = MmioRead32 (LAN9118_PMT_CTRL);
+  PmConf = Lan9118MmioRead32 (LAN9118_PMT_CTRL);
 
   // MPTCTRL_WOL_EN: Allow Wake-On-Lan to detect wake up frames or magic packets
   // MPTCTRL_ED_EN:  Allow energy detection to allow lowest power consumption mode
@@ -430,7 +430,7 @@ SnpReset (
   PmConf |= (MPTCTRL_WOL_EN | MPTCTRL_ED_EN | MPTCTRL_PME_EN);
 
   // Write the current configuration to the register
-  MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
+  Lan9118MmioWrite32 (LAN9118_PMT_CTRL, PmConf);
   gBS->Stall (LAN9118_STALL);
 
   // Reactivate the LEDs
@@ -441,11 +441,11 @@ SnpReset (
 
   // Check that a buffer size was specified in SnpInitialize
   if (gTxBuffer != 0) {
-    HwConf = MmioRead32 (LAN9118_HW_CFG);        // Read the HW register
+    HwConf = Lan9118MmioRead32 (LAN9118_HW_CFG);        // Read the HW register
     HwConf &= ~HW_CFG_TX_FIFO_SIZE_MASK;         // Clear buffer bits first
     HwConf |= HW_CFG_TX_FIFO_SIZE(gTxBuffer);    // assign size chosen in SnpInitialize
 
-    MmioWrite32 (LAN9118_HW_CFG, HwConf);        // Write the conf
+    Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf);        // Write the conf
     gBS->Stall (LAN9118_STALL);
   }
 
@@ -454,7 +454,7 @@ SnpReset (
   StartTx (START_TX_MAC | START_TX_CFG | START_TX_CLEAR, Snp);
 
   // Now acknowledge all interrupts
-  MmioWrite32 (LAN9118_INT_STS, ~0);
+  Lan9118MmioWrite32 (LAN9118_INT_STS, ~0);
 
   return EFI_SUCCESS;
 }
@@ -996,12 +996,12 @@ SnpGetStatus (
   // consumer of SNP does not call GetStatus.)
   // TODO will we lose TxStatuses if this happens? Maybe in SnpTransmit we
   // should check for it and dump the TX Status FIFO.
-  FifoInt = MmioRead32 (LAN9118_FIFO_INT);
+  FifoInt = Lan9118MmioRead32 (LAN9118_FIFO_INT);
 
   // Clear the TX Status FIFO Overflow
   if ((FifoInt & INSTS_TXSO) == 0) {
     FifoInt |= INSTS_TXSO;
-    MmioWrite32 (LAN9118_FIFO_INT, FifoInt);
+    Lan9118MmioWrite32 (LAN9118_FIFO_INT, FifoInt);
   }
 
   // Read interrupt status if IrqStat is not NULL
@@ -1009,30 +1009,30 @@ SnpGetStatus (
     *IrqStat = 0;
 
     // Check for receive interrupt
-    if (MmioRead32 (LAN9118_INT_STS) & INSTS_RSFL) { // Data moved from rx FIFO
+    if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_RSFL) { // Data moved from rx FIFO
       *IrqStat |= EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;
-      MmioWrite32 (LAN9118_INT_STS,INSTS_RSFL);
+      Lan9118MmioWrite32 (LAN9118_INT_STS,INSTS_RSFL);
     }
 
     // Check for transmit interrupt
-    if (MmioRead32 (LAN9118_INT_STS) & INSTS_TSFL) {
+    if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_TSFL) {
       *IrqStat |= EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT;
-      MmioWrite32 (LAN9118_INT_STS,INSTS_TSFL);
+      Lan9118MmioWrite32 (LAN9118_INT_STS,INSTS_TSFL);
     }
 
     // Check for software interrupt
-    if (MmioRead32 (LAN9118_INT_STS) & INSTS_SW_INT) {
+    if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_SW_INT) {
       *IrqStat |= EFI_SIMPLE_NETWORK_SOFTWARE_INTERRUPT;
-      MmioWrite32 (LAN9118_INT_STS,INSTS_SW_INT);
+      Lan9118MmioWrite32 (LAN9118_INT_STS,INSTS_SW_INT);
     }
   }
 
   // Check Status of transmitted packets
   // (We ignore TXSTATUS_NO_CA has it might happen in Full Duplex)
 
-  NumTxStatusEntries = MmioRead32(LAN9118_TX_FIFO_INF) & TXFIFOINF_TXSUSED_MASK;
+  NumTxStatusEntries = Lan9118MmioRead32(LAN9118_TX_FIFO_INF) & TXFIFOINF_TXSUSED_MASK;
   if (NumTxStatusEntries > 0) {
-    TxStatus = MmioRead32 (LAN9118_TX_STATUS);
+    TxStatus = Lan9118MmioRead32 (LAN9118_TX_STATUS);
     PacketTag = TxStatus >> 16;
     TxStatus = TxStatus & 0xFFFF;
     if ((TxStatus & TXSTATUS_ES) && (TxStatus != (TXSTATUS_ES | TXSTATUS_NO_CA))) {
@@ -1063,7 +1063,7 @@ SnpGetStatus (
   }
 
   // Check for a TX Error interrupt
-  Interrupts = MmioRead32 (LAN9118_INT_STS);
+  Interrupts = Lan9118MmioRead32 (LAN9118_INT_STS);
   if (Interrupts & INSTS_TXE) {
     DEBUG ((EFI_D_ERROR, "LAN9118: Transmitter error. Restarting..."));
 
@@ -1221,25 +1221,25 @@ SnpTransmit (
     CommandB = TX_CMD_B_PACKET_TAG (PacketTag) | TX_CMD_B_PACKET_LENGTH (BuffSize);
 
     // Write the commands first
-    MmioWrite32 (LAN9118_TX_DATA, CommandA);
-    MmioWrite32 (LAN9118_TX_DATA, CommandB);
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandA);
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandB);
 
     // Write the destination address
-    MmioWrite32 (LAN9118_TX_DATA,
+    Lan9118MmioWrite32 (LAN9118_TX_DATA,
                (DstAddr->Addr[0]) |
                (DstAddr->Addr[1] << 8) |
                (DstAddr->Addr[2] << 16) |
                (DstAddr->Addr[3] << 24)
                );
 
-    MmioWrite32 (LAN9118_TX_DATA,
+    Lan9118MmioWrite32 (LAN9118_TX_DATA,
                (DstAddr->Addr[4]) |
                (DstAddr->Addr[5] << 8) |
                (SrcAddr->Addr[0] << 16) | // Write the Source Address
                (SrcAddr->Addr[1] << 24)
                );
 
-    MmioWrite32 (LAN9118_TX_DATA,
+    Lan9118MmioWrite32 (LAN9118_TX_DATA,
                (SrcAddr->Addr[2]) |
                (SrcAddr->Addr[3] << 8) |
                (SrcAddr->Addr[4] << 16) |
@@ -1247,18 +1247,18 @@ SnpTransmit (
                );
 
     // Write the Protocol
-    MmioWrite32 (LAN9118_TX_DATA, (UINT32)(HTONS (LocalProtocol)));
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, (UINT32)(HTONS (LocalProtocol)));
 
     // Next buffer is the payload
     CommandA = TX_CMD_A_LAST_SEGMENT | TX_CMD_A_BUFF_SIZE (BuffSize - HdrSize) | TX_CMD_A_COMPLETION_INT | TX_CMD_A_DATA_START_OFFSET (2); // 2 bytes beginning offset
 
     // Write the commands
-    MmioWrite32 (LAN9118_TX_DATA, CommandA);
-    MmioWrite32 (LAN9118_TX_DATA, CommandB);
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandA);
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandB);
 
     // Write the payload
     for (Count = 0; Count < ((BuffSize + 3) >> 2) - 3; Count++) {
-      MmioWrite32 (LAN9118_TX_DATA, LocalData[Count + 3]);
+      Lan9118MmioWrite32 (LAN9118_TX_DATA, LocalData[Count + 3]);
     }
   } else {
     // Format pointer
@@ -1269,12 +1269,12 @@ SnpTransmit (
     CommandB = TX_CMD_B_PACKET_TAG (PacketTag) | TX_CMD_B_PACKET_LENGTH (BuffSize);
 
     // Write the commands first
-    MmioWrite32 (LAN9118_TX_DATA, CommandA);
-    MmioWrite32 (LAN9118_TX_DATA, CommandB);
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandA);
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandB);
 
     // Write all the data
     for (Count = 0; Count < ((BuffSize + 3) >> 2); Count++) {
-      MmioWrite32 (LAN9118_TX_DATA, LocalData[Count]);
+      Lan9118MmioWrite32 (LAN9118_TX_DATA, LocalData[Count]);
     }
   }
 
@@ -1362,13 +1362,13 @@ SnpReceive (
   // explain those errors has been found so far and everything seems to
   // work perfectly when they are just ignored.
   //
-  IntSts = MmioRead32 (LAN9118_INT_STS);
+  IntSts = Lan9118MmioRead32 (LAN9118_INT_STS);
   if ((IntSts & INSTS_RXE) && (!(IntSts & INSTS_RSFF))) {
-    MmioWrite32 (LAN9118_INT_STS, INSTS_RXE);
+    Lan9118MmioWrite32 (LAN9118_INT_STS, INSTS_RXE);
   }
 
   // Count dropped frames
-  DroppedFrames = MmioRead32 (LAN9118_RX_DROP);
+  DroppedFrames = Lan9118MmioRead32 (LAN9118_RX_DROP);
   LanDriver->Stats.RxDroppedFrames += DroppedFrames;
 
   NumPackets = RxStatusUsedSpace (0, Snp) / 4;
@@ -1377,7 +1377,7 @@ SnpReceive (
   }
 
   // Read Rx Status (only if not empty)
-  RxFifoStatus = MmioRead32 (LAN9118_RX_STATUS);
+  RxFifoStatus = Lan9118MmioRead32 (LAN9118_RX_STATUS);
   LanDriver->Stats.RxTotalFrames += 1;
 
   // First check for errors
@@ -1450,13 +1450,13 @@ SnpReceive (
 
   // Set the amount of data to be transfered out of FIFO for THIS packet
   // This can be used to trigger an interrupt, and status can be checked
-  RxCfgValue = MmioRead32 (LAN9118_RX_CFG);
+  RxCfgValue = Lan9118MmioRead32 (LAN9118_RX_CFG);
   RxCfgValue &= ~(RXCFG_RX_DMA_CNT_MASK);
   RxCfgValue |= RXCFG_RX_DMA_CNT (ReadLimit);
 
   // Set end alignment to 4-bytes
   RxCfgValue &= ~(RXCFG_RX_END_ALIGN_MASK);
-  MmioWrite32 (LAN9118_RX_CFG, RxCfgValue);
+  Lan9118MmioWrite32 (LAN9118_RX_CFG, RxCfgValue);
 
   // Update buffer size
   *BuffSize = PLength; // -4 bytes may be needed: Received in buffer as
@@ -1471,7 +1471,7 @@ SnpReceive (
 
   // Read Rx Packet
   for (Count = 0; Count < ReadLimit; Count++) {
-    RawData[Count] = MmioRead32 (LAN9118_RX_DATA);
+    RawData[Count] = Lan9118MmioRead32 (LAN9118_RX_DATA);
   }
 
   // Get the destination address
@@ -1502,7 +1502,7 @@ SnpReceive (
   }
 
   // Check for Rx errors (worst possible error)
-  if (MmioRead32 (LAN9118_INT_STS) & INSTS_RXE) {
+  if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_RXE) {
     DEBUG ((EFI_D_WARN, "Warning: Receiver Error. Restarting...\n"));
 
     // Software reset, the RXE interrupt is cleared by the reset.
diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeHw.h b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeHw.h
index 1189584..e44e295 100644
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeHw.h
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeHw.h
@@ -158,8 +158,8 @@
 #define TXSTATUS_PTAG_MASK                    (0xFFFF0000)              // Mask for Unique ID of packets (So we know who the packets are for)
 
 // ID_REV register bits
-#define IDREV_ID                              ((MmioRead32(LAN9118_ID_REV) & 0xFFFF0000) >> 16)
-#define IDREV_REV                             (MmioRead32(LAN9118_ID_REV) & 0x0000FFFF)
+#define IDREV_ID                              ((Lan9118MmioRead32(LAN9118_ID_REV) & 0xFFFF0000) >> 16)
+#define IDREV_REV                             (Lan9118MmioRead32(LAN9118_ID_REV) & 0x0000FFFF)
 
 // Interrupt Config Register bits
 #define IRQCFG_IRQ_TYPE                       BIT0                    // IRQ Buffer type
diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
index 002ea20..61f11b6 100644
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
@@ -98,7 +98,7 @@ IndirectMACRead32 (
   ASSERT(Index <= 12);
 
   // Wait until CSR busy bit is cleared
-  while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
+  while ((Lan9118MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
 
   // Set CSR busy bit to ensure read will occur
   // Set the R/W bit to indicate we are reading
@@ -106,13 +106,13 @@ IndirectMACRead32 (
   MacCSR = MAC_CSR_BUSY | MAC_CSR_READ | MAC_CSR_ADDR(Index);
 
   // Write to the register
-  MmioWrite32 (LAN9118_MAC_CSR_CMD, MacCSR);
+  Lan9118MmioWrite32 (LAN9118_MAC_CSR_CMD, MacCSR);
 
   // Wait until CSR busy bit is cleared
-  while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
+  while ((Lan9118MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
 
   // Now read from data register to get read value
-  return MmioRead32 (LAN9118_MAC_CSR_DATA);
+  return Lan9118MmioRead32 (LAN9118_MAC_CSR_DATA);
 }
 
 /*
@@ -134,8 +134,8 @@ WaitDummyReads (
   UINTN Count
   )
 {
-       while (Count--)
-         MmioRead32(LAN9118_BYTE_TEST);
+  while (Count--)
+    MmioRead32(LAN9118_BYTE_TEST);
 }
 
 UINT32
@@ -177,7 +177,7 @@ IndirectMACWrite32 (
   ASSERT(Index <= 12);
 
   // Wait until CSR busy bit is cleared
-  while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
+  while ((Lan9118MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
 
   // Set CSR busy bit to ensure read will occur
   // Set the R/W bit to indicate we are writing
@@ -185,13 +185,13 @@ IndirectMACWrite32 (
   MacCSR = MAC_CSR_BUSY | MAC_CSR_WRITE | MAC_CSR_ADDR(Index);
 
   // Now write the value to the register before issuing the write command
-  ValueWritten = MmioWrite32 (LAN9118_MAC_CSR_DATA, Value);
+  ValueWritten = Lan9118MmioWrite32 (LAN9118_MAC_CSR_DATA, Value);
 
   // Write the config to the register
-  MmioWrite32 (LAN9118_MAC_CSR_CMD, MacCSR);
+  Lan9118MmioWrite32 (LAN9118_MAC_CSR_CMD, MacCSR);
 
   // Wait until CSR busy bit is cleared
-  while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
+  while ((Lan9118MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
 
   return ValueWritten;
 }
@@ -283,23 +283,23 @@ IndirectEEPROMRead32 (
   EepromCmd |= E2P_EPC_ADDRESS(Index);
 
   // Write to Eeprom command register
-  MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
+  Lan9118MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
   gBS->Stall (LAN9118_STALL);
 
   // Wait until operation has completed
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
 
   // Check that operation didn't time out
-  if (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_TIMEOUT) {
+  if (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_TIMEOUT) {
     DEBUG ((EFI_D_ERROR, "EEPROM Operation Timed out: Read command on index %x\n",Index));
     return 0;
   }
 
   // Wait until operation has completed
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
 
   // Finally read the value
-  return MmioRead32 (LAN9118_E2P_DATA);
+  return Lan9118MmioRead32 (LAN9118_E2P_DATA);
 }
 
 // Function to write to EEPROM memory
@@ -315,7 +315,7 @@ IndirectEEPROMWrite32 (
   ValueWritten = 0;
 
   // Read the EEPROM Command register
-  EepromCmd = MmioRead32 (LAN9118_E2P_CMD);
+  EepromCmd = Lan9118MmioRead32 (LAN9118_E2P_CMD);
 
   // Set the busy bit to ensure read will occur
   EepromCmd |= ((UINT32)1 << 31);
@@ -328,23 +328,23 @@ IndirectEEPROMWrite32 (
   EepromCmd |= (Index & 0xF);
 
   // Write the value to the data register first
-  ValueWritten = MmioWrite32 (LAN9118_E2P_DATA, Value);
+  ValueWritten = Lan9118MmioWrite32 (LAN9118_E2P_DATA, Value);
 
   // Write to Eeprom command register
-  MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
+  Lan9118MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);
   gBS->Stall (LAN9118_STALL);
 
   // Wait until operation has completed
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
 
   // Check that operation didn't time out
-  if (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_TIMEOUT) {
+  if (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_TIMEOUT) {
     DEBUG ((EFI_D_ERROR, "EEPROM Operation Timed out: Write command at memloc 0x%x, with value 0x%x\n",Index, Value));
     return 0;
   }
 
   // Wait until operation has completed
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
 
   return ValueWritten;
 }
@@ -407,15 +407,15 @@ Lan9118Initialize (
   UINT64 DefaultMacAddress;
 
   // Attempt to wake-up the device if it is in a lower power state
-  if (((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PM_MODE_MASK) >> 12) != 0) {
+  if (((Lan9118MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PM_MODE_MASK) >> 12) != 0) {
     DEBUG ((DEBUG_NET, "Waking from reduced power state.\n"));
-    MmioWrite32 (LAN9118_BYTE_TEST, 0xFFFFFFFF);
+    Lan9118MmioWrite32 (LAN9118_BYTE_TEST, 0xFFFFFFFF);
     gBS->Stall (LAN9118_STALL);
   }
 
   // Check that device is active
   Retries = 20;
-  while ((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_READY) == 0 && --Retries) {
+  while ((Lan9118MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_READY) == 0 && --Retries) {
     gBS->Stall (LAN9118_STALL);
   }
   if (!Retries) {
@@ -424,7 +424,7 @@ Lan9118Initialize (
 
   // Check that EEPROM isn't active
   Retries = 20;
-  while ((MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY) && --Retries){
+  while ((Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY) && --Retries){
     gBS->Stall (LAN9118_STALL);
   }
   if (!Retries) {
@@ -433,7 +433,7 @@ Lan9118Initialize (
 
   // Check if a MAC address was loaded from EEPROM, and if it was, set it as the
   // current address.
-  if ((MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_MAC_ADDRESS_LOADED) == 0) {
+  if ((Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_MAC_ADDRESS_LOADED) == 0) {
     DEBUG ((EFI_D_ERROR, "Warning: There was an error detecting EEPROM or loading the MAC Address.\n"));
 
     // If we had an address before (set by StationAddess), continue to use it
@@ -453,9 +453,9 @@ Lan9118Initialize (
   }
 
   // Clear and acknowledge interrupts
-  MmioWrite32 (LAN9118_INT_EN, 0);
-  MmioWrite32 (LAN9118_IRQ_CFG, 0);
-  MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);
+  Lan9118MmioWrite32 (LAN9118_INT_EN, 0);
+  Lan9118MmioWrite32 (LAN9118_IRQ_CFG, 0);
+  Lan9118MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);
 
   // Do self tests here?
 
@@ -482,7 +482,7 @@ SoftReset (
   StopRx (STOP_RX_CLEAR, Snp); // Clear receiver FIFO
 
   // Issue the reset
-  HwConf = MmioRead32 (LAN9118_HW_CFG);
+  HwConf = Lan9118MmioRead32 (LAN9118_HW_CFG);
   HwConf |= 1;
 
   // Set the Must Be One (MBO) bit
@@ -491,14 +491,14 @@ SoftReset (
   }
 
   // Check that EEPROM isn't active
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
 
   // Write the configuration
-  MmioWrite32 (LAN9118_HW_CFG, HwConf);
+  Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf);
   gBS->Stall (LAN9118_STALL);
 
   // Wait for reset to complete
-  while (MmioRead32 (LAN9118_HW_CFG) & HWCFG_SRST) {
+  while (Lan9118MmioRead32 (LAN9118_HW_CFG) & HWCFG_SRST) {
 
     gBS->Stall (LAN9118_STALL);
     ResetTime += 1;
@@ -511,15 +511,15 @@ SoftReset (
   }
 
   // Check that EEPROM isn't active
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
 
   // TODO we probably need to re-set the mac address here.
 
   // Clear and acknowledge all interrupts
   if (Flags & SOFT_RESET_CLEAR_INT) {
-    MmioWrite32 (LAN9118_INT_EN, 0);
-    MmioWrite32 (LAN9118_IRQ_CFG, 0);
-    MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);
+    Lan9118MmioWrite32 (LAN9118_INT_EN, 0);
+    Lan9118MmioWrite32 (LAN9118_IRQ_CFG, 0);
+    Lan9118MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);
   }
 
   // Do self tests here?
@@ -542,12 +542,12 @@ PhySoftReset (
 
   // PMT PHY reset takes precedence over BCR
   if (Flags & PHY_RESET_PMT) {
-    PmtCtrl = MmioRead32 (LAN9118_PMT_CTRL);
+    PmtCtrl = Lan9118MmioRead32 (LAN9118_PMT_CTRL);
     PmtCtrl |= MPTCTRL_PHY_RST;
-    MmioWrite32 (LAN9118_PMT_CTRL,PmtCtrl);
+    Lan9118MmioWrite32 (LAN9118_PMT_CTRL,PmtCtrl);
 
     // Wait for completion
-    while (MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PHY_RST) {
+    while (Lan9118MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PHY_RST) {
       gBS->Stall (LAN9118_STALL);
     }
   // PHY Basic Control Register reset
@@ -562,9 +562,9 @@ PhySoftReset (
 
   // Clear and acknowledge all interrupts
   if (Flags & PHY_SOFT_RESET_CLEAR_INT) {
-    MmioWrite32 (LAN9118_INT_EN, 0);
-    MmioWrite32 (LAN9118_IRQ_CFG, 0);
-    MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);
+    Lan9118MmioWrite32 (LAN9118_INT_EN, 0);
+    Lan9118MmioWrite32 (LAN9118_IRQ_CFG, 0);
+    Lan9118MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);
   }
 
   return EFI_SUCCESS;
@@ -582,14 +582,14 @@ ConfigureHardware (
 
   // Check if we want to use LEDs on GPIO
   if (Flags & HW_CONF_USE_LEDS) {
-    GpioConf = MmioRead32 (LAN9118_GPIO_CFG);
+    GpioConf = Lan9118MmioRead32 (LAN9118_GPIO_CFG);
 
     // Enable GPIO as LEDs and Config as Push-Pull driver
     GpioConf |= GPIO_GPIO0_PUSH_PULL | GPIO_GPIO1_PUSH_PULL | GPIO_GPIO2_PUSH_PULL |
                 GPIO_LED1_ENABLE | GPIO_LED2_ENABLE | GPIO_LED3_ENABLE;
 
     // Write the configuration
-    MmioWrite32 (LAN9118_GPIO_CFG, GpioConf);
+    Lan9118MmioWrite32 (LAN9118_GPIO_CFG, GpioConf);
     gBS->Stall (LAN9118_STALL);
   }
 
@@ -716,9 +716,9 @@ StopTx (
 
   // Check if we want to clear tx
   if (Flags & STOP_TX_CLEAR) {
-    TxCfg = MmioRead32 (LAN9118_TX_CFG);
+    TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG);
     TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;
-    MmioWrite32 (LAN9118_TX_CFG, TxCfg);
+    Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg);
     gBS->Stall (LAN9118_STALL);
   }
 
@@ -733,15 +733,15 @@ StopTx (
   }
 
   if (Flags & STOP_TX_CFG) {
-    TxCfg = MmioRead32 (LAN9118_TX_CFG);
+    TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG);
 
     if (TxCfg & TXCFG_TX_ON) {
       TxCfg |= TXCFG_STOP_TX;
-      MmioWrite32 (LAN9118_TX_CFG, TxCfg);
+      Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg);
       gBS->Stall (LAN9118_STALL);
 
       // Wait for Tx to finish transmitting
-      while (MmioRead32 (LAN9118_TX_CFG) & TXCFG_STOP_TX);
+      while (Lan9118MmioRead32 (LAN9118_TX_CFG) & TXCFG_STOP_TX);
     }
   }
 
@@ -770,12 +770,12 @@ StopRx (
 
   // Check if we want to clear receiver FIFOs
   if (Flags & STOP_RX_CLEAR) {
-    RxCfg = MmioRead32 (LAN9118_RX_CFG);
+    RxCfg = Lan9118MmioRead32 (LAN9118_RX_CFG);
     RxCfg |= RXCFG_RX_DUMP;
-    MmioWrite32 (LAN9118_RX_CFG, RxCfg);
+    Lan9118MmioWrite32 (LAN9118_RX_CFG, RxCfg);
     gBS->Stall (LAN9118_STALL);
 
-    while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
+    while (Lan9118MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
   }
 
   return EFI_SUCCESS;
@@ -796,9 +796,9 @@ StartTx (
 
   // Check if we want to clear tx
   if (Flags & START_TX_CLEAR) {
-    TxCfg = MmioRead32 (LAN9118_TX_CFG);
+    TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG);
     TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;
-    MmioWrite32 (LAN9118_TX_CFG, TxCfg);
+    Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg);
     gBS->Stall (LAN9118_STALL);
   }
 
@@ -815,11 +815,11 @@ StartTx (
 
   // Check if tx was started from TX_CFG and enable if not
   if (Flags & START_TX_CFG) {
-    TxCfg = MmioRead32 (LAN9118_TX_CFG);
+    TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG);
     gBS->Stall (LAN9118_STALL);
     if ((TxCfg & TXCFG_TX_ON) == 0) {
       TxCfg |= TXCFG_TX_ON;
-      MmioWrite32 (LAN9118_TX_CFG, TxCfg);
+      Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg);
       gBS->Stall (LAN9118_STALL);
     }
   }
@@ -847,12 +847,12 @@ StartRx (
   if ((MacCsr & MACCR_RX_EN) == 0) {
     // Check if we want to clear receiver FIFOs before starting
     if (Flags & START_RX_CLEAR) {
-      RxCfg = MmioRead32 (LAN9118_RX_CFG);
+      RxCfg = Lan9118MmioRead32 (LAN9118_RX_CFG);
       RxCfg |= RXCFG_RX_DUMP;
-      MmioWrite32 (LAN9118_RX_CFG, RxCfg);
+      Lan9118MmioWrite32 (LAN9118_RX_CFG, RxCfg);
       gBS->Stall (LAN9118_STALL);
 
-      while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
+      while (Lan9118MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);
     }
 
     MacCsr |= MACCR_RX_EN;
@@ -874,7 +874,7 @@ TxDataFreeSpace (
   UINT32 FreeSpace;
 
   // Get the amount of free space from information register
-  TxInf = MmioRead32 (LAN9118_TX_FIFO_INF);
+  TxInf = Lan9118MmioRead32 (LAN9118_TX_FIFO_INF);
   FreeSpace = (TxInf & TXFIFOINF_TDFREE_MASK);
 
   return FreeSpace; // Value in bytes
@@ -891,7 +891,7 @@ TxStatusUsedSpace (
   UINT32 UsedSpace;
 
   // Get the amount of used space from information register
-  TxInf = MmioRead32 (LAN9118_TX_FIFO_INF);
+  TxInf = Lan9118MmioRead32 (LAN9118_TX_FIFO_INF);
   UsedSpace = (TxInf & TXFIFOINF_TXSUSED_MASK) >> 16;
 
   return UsedSpace << 2; // Value in bytes
@@ -908,7 +908,7 @@ RxDataUsedSpace (
   UINT32 UsedSpace;
 
   // Get the amount of used space from information register
-  RxInf = MmioRead32 (LAN9118_RX_FIFO_INF);
+  RxInf = Lan9118MmioRead32 (LAN9118_RX_FIFO_INF);
   UsedSpace = (RxInf & RXFIFOINF_RXDUSED_MASK);
 
   return UsedSpace; // Value in bytes (rounded up to nearest DWORD)
@@ -925,7 +925,7 @@ RxStatusUsedSpace (
   UINT32 UsedSpace;
 
   // Get the amount of used space from information register
-  RxInf = MmioRead32 (LAN9118_RX_FIFO_INF);
+  RxInf = Lan9118MmioRead32 (LAN9118_RX_FIFO_INF);
   UsedSpace = (RxInf & RXFIFOINF_RXSUSED_MASK) >> 16;
 
   return UsedSpace << 2; // Value in bytes
@@ -963,7 +963,7 @@ ChangeFifoAllocation (
   // If we use the FIFOs (always use this first)
   if (Flags & ALLOC_USE_FIFOS) {
     // Read the current value of allocation
-    HwConf = MmioRead32 (LAN9118_HW_CFG);
+    HwConf = Lan9118MmioRead32 (LAN9118_HW_CFG);
     TxFifoOption = (HwConf >> 16) & 0xF;
 
     // Choose the correct size (always use larger than requested if possible)
@@ -1046,7 +1046,7 @@ ChangeFifoAllocation (
   // Clear and assign the new size option
   HwConf &= ~(0xF0000);
   HwConf |= ((TxFifoOption & 0xF) << 16);
-  MmioWrite32 (LAN9118_HW_CFG, HwConf);
+  Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf);
   gBS->Stall (LAN9118_STALL);
 
   return EFI_SUCCESS;
