| Message ID | 1521093843-48615-2-git-send-email-heyi.guo@linaro.org |
|---|---|
| State | Accepted |
| Commit | 6a9e59a1bc40603fa8d9b25a406ea9bd5fe63915 |
| Headers | show |
| Series | Add translation support to generic PciHostBridge | expand |
Reviewed-by: Benjamin You <benjamin.you@intel.com> > -----Original Message----- > From: Heyi Guo [mailto:heyi.guo@linaro.org] > Sent: Thursday, March 15, 2018 2:04 PM > To: edk2-devel@lists.01.org > Cc: Heyi Guo <heyi.guo@linaro.org>; Yi Li <phoenix.liyi@huawei.com>; Ma, > Maurice <maurice.ma@intel.com>; Agyeman, Prince > <prince.agyeman@intel.com>; You, Benjamin <benjamin.you@intel.com>; Ni, > Ruiyu <ruiyu.ni@intel.com>; Laszlo Ersek <lersek@redhat.com>; Ard Biesheuvel > <ard.biesheuvel@linaro.org> > Subject: [PATCH v7 1/6] CorebootPayloadPkg/PciHostBridgeLib: clear aperture > vars for (re)init > > Use ZeroMem() to initialize (or re-initialize) all fields in temporary > PCI_ROOT_BRIDGE_APERTURE variables to zero. This is not mandatory but > helpful for future extension: when we add new fields to > PCI_ROOT_BRIDGE_APERTURE and the default value of these fields can > safely be zero, this code will not suffer from an additional change. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Heyi Guo <heyi.guo@linaro.org> > Signed-off-by: Yi Li <phoenix.liyi@huawei.com> > Reviewed-by: Ni Ruiyu <ruiyu.ni@intel.com> > Cc: Maurice Ma <maurice.ma@intel.com> > Cc: Prince Agyeman <prince.agyeman@intel.com> > Cc: Benjamin You <benjamin.you@intel.com> > Cc: Ruiyu Ni <ruiyu.ni@intel.com> > Cc: Laszlo Ersek <lersek@redhat.com> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > --- > > Notes: > v6: > - Move ZeroMem() into the loop just as Laszlo commented on OvmfPkg > [Laszlo] > - Minor changes in commit message > > CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c | 7 > ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git > a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c > b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c > index 6d94ff72c956..18dcbafdf0c6 100644 > --- a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c > +++ b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c > @@ -328,8 +328,13 @@ ScanForRootBridges ( > for (PrimaryBus = 0; PrimaryBus <= PCI_MAX_BUS; PrimaryBus = SubBus + 1) { > SubBus = PrimaryBus; > Attributes = 0; > + > + ZeroMem (&Io, sizeof (Io)); > + ZeroMem (&Mem, sizeof (Mem)); > + ZeroMem (&MemAbove4G, sizeof (MemAbove4G)); > + ZeroMem (&PMem, sizeof (PMem)); > + ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G)); > Io.Base = Mem.Base = MemAbove4G.Base = PMem.Base = > PMemAbove4G.Base = MAX_UINT64; > - Io.Limit = Mem.Limit = MemAbove4G.Limit = PMem.Limit = > PMemAbove4G.Limit = 0; > // > // Scan all the PCI devices on the primary bus of the PCI root bridge > // > -- > 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
diff --git a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c index 6d94ff72c956..18dcbafdf0c6 100644 --- a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c +++ b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c @@ -328,8 +328,13 @@ ScanForRootBridges ( for (PrimaryBus = 0; PrimaryBus <= PCI_MAX_BUS; PrimaryBus = SubBus + 1) { SubBus = PrimaryBus; Attributes = 0; + + ZeroMem (&Io, sizeof (Io)); + ZeroMem (&Mem, sizeof (Mem)); + ZeroMem (&MemAbove4G, sizeof (MemAbove4G)); + ZeroMem (&PMem, sizeof (PMem)); + ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G)); Io.Base = Mem.Base = MemAbove4G.Base = PMem.Base = PMemAbove4G.Base = MAX_UINT64; - Io.Limit = Mem.Limit = MemAbove4G.Limit = PMem.Limit = PMemAbove4G.Limit = 0; // // Scan all the PCI devices on the primary bus of the PCI root bridge //