From patchwork Thu Nov 3 23:32:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laszlo Ersek X-Patchwork-Id: 80755 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp888792qge; Thu, 3 Nov 2016 16:32:32 -0700 (PDT) X-Received: by 10.99.52.10 with SMTP id b10mr17737379pga.42.1478215952354; Thu, 03 Nov 2016 16:32:32 -0700 (PDT) Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id xc5si10167201pab.198.2016.11.03.16.32.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Nov 2016 16:32:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id BBFE681D5B; Thu, 3 Nov 2016 16:32:29 -0700 (PDT) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AE65681D59 for ; Thu, 3 Nov 2016 16:32:28 -0700 (PDT) Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 52631C04B924; Thu, 3 Nov 2016 23:32:30 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-178.phx2.redhat.com [10.3.116.178]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id uA3NWPe8011491; Thu, 3 Nov 2016 19:32:29 -0400 From: Laszlo Ersek To: edk2-devel-01 Date: Fri, 4 Nov 2016 00:32:18 +0100 Message-Id: <20161103233218.17073-3-lersek@redhat.com> In-Reply-To: <20161103233218.17073-1-lersek@redhat.com> References: <20161103233218.17073-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Thu, 03 Nov 2016 23:32:30 +0000 (UTC) Subject: [edk2] [PATCH v3 2/2] OvmfPkg/ResetVector: Depend on PCD values of the page tables. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Justen Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Marvin Häuser Currently, the values of the page tables' address and size are hard-coded in the ResetVector. This patch replaces this with a PCD dependency for the NASM Reset Vector. Checks for the size have been added to alert the developer to rewrite the ASM according to the new size, if it has been changed. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Marvin Haeuser [lersek@redhat.com: simplify patch] Cc: Jordan Justen Cc: Marvin Häuser Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek --- OvmfPkg/ResetVector/ResetVector.inf | 5 +++++ OvmfPkg/ResetVector/Ia32/PageTables64.asm | 22 +++++++++----------- OvmfPkg/ResetVector/ResetVector.nasmb | 12 +++++++++-- 3 files changed, 25 insertions(+), 14 deletions(-) diff --git a/OvmfPkg/ResetVector/ResetVector.inf b/OvmfPkg/ResetVector/ResetVector.inf index 46610d243ecf..82df438db0dc 100644 --- a/OvmfPkg/ResetVector/ResetVector.inf +++ b/OvmfPkg/ResetVector/ResetVector.inf @@ -30,8 +30,13 @@ [Sources] [Packages] MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec UefiCpuPkg/UefiCpuPkg.dec [BuildOptions] *_*_IA32_NASMB_FLAGS = -I$(WORKSPACE)/UefiCpuPkg/ResetVector/Vtf0/ *_*_X64_NASMB_FLAGS = -I$(WORKSPACE)/UefiCpuPkg/ResetVector/Vtf0/ + +[FixedPcd] + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase ## CONSUMES + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize ## CONSUMES diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm b/OvmfPkg/ResetVector/Ia32/PageTables64.asm index b5a4cf8d7187..25c9ebd5f73e 100644 --- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm +++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm @@ -44,10 +44,8 @@ BITS 32 SetCr3ForPageTables64: ; - ; For OVMF, build some initial page tables at 0x800000-0x806000. - ; - ; This range should match with PcdOvmfSecPageTablesBase and - ; PcdOvmfSecPageTablesSize which are declared in the FDF files. + ; For OVMF, build some initial page tables at + ; PT_ADDR (0) .. PT_ADDR (0x6000). ; ; At the end of PEI, the pages tables will be rebuilt into a ; more permanent location by DxeIpl. @@ -56,21 +54,21 @@ SetCr3ForPageTables64: mov ecx, 6 * 0x1000 / 4 xor eax, eax clearPageTablesMemoryLoop: - mov dword[ecx * 4 + 0x800000 - 4], eax + mov dword[ecx * 4 + PT_ADDR (0) - 4], eax loop clearPageTablesMemoryLoop ; ; Top level Page Directory Pointers (1 * 512GB entry) ; - mov dword[0x800000], 0x801000 + PAGE_PDP_ATTR + mov dword[PT_ADDR (0)], PT_ADDR (0x1000) + PAGE_PDP_ATTR ; ; Next level Page Directory Pointers (4 * 1GB entries => 4GB) ; - mov dword[0x801000], 0x802000 + PAGE_PDP_ATTR - mov dword[0x801008], 0x803000 + PAGE_PDP_ATTR - mov dword[0x801010], 0x804000 + PAGE_PDP_ATTR - mov dword[0x801018], 0x805000 + PAGE_PDP_ATTR + mov dword[PT_ADDR (0x1000)], PT_ADDR (0x2000) + PAGE_PDP_ATTR + mov dword[PT_ADDR (0x1008)], PT_ADDR (0x3000) + PAGE_PDP_ATTR + mov dword[PT_ADDR (0x1010)], PT_ADDR (0x4000) + PAGE_PDP_ATTR + mov dword[PT_ADDR (0x1018)], PT_ADDR (0x5000) + PAGE_PDP_ATTR ; ; Page Table Entries (2048 * 2MB entries => 4GB) @@ -81,13 +79,13 @@ pageTableEntriesLoop: dec eax shl eax, 21 add eax, PAGE_2M_PDE_ATTR - mov [ecx * 8 + 0x802000 - 8], eax + mov [ecx * 8 + PT_ADDR (0x2000) - 8], eax loop pageTableEntriesLoop ; ; Set CR3 now that the paging structures are available ; - mov eax, 0x800000 + mov eax, PT_ADDR (0) mov cr3, eax OneTimeCallRet SetCr3ForPageTables64 diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb b/OvmfPkg/ResetVector/ResetVector.nasmb index 31ac06ae4a8c..65f39a7d2d52 100644 --- a/OvmfPkg/ResetVector/ResetVector.nasmb +++ b/OvmfPkg/ResetVector/ResetVector.nasmb @@ -53,8 +53,16 @@ %include "Ia32/SearchForSecEntry.asm" %ifdef ARCH_X64 -%include "Ia32/Flat32ToFlat64.asm" -%include "Ia32/PageTables64.asm" + #include + + %if (FixedPcdGet32 (PcdOvmfSecPageTablesSize) != 0x6000) + %error "This implementation inherently depends on PcdOvmfSecPageTablesSize" + %endif + + %define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset)) + + %include "Ia32/Flat32ToFlat64.asm" + %include "Ia32/PageTables64.asm" %endif %include "Ia16/Real16ToFlat32.asm"