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[198.145.21.10]) by mx.google.com with ESMTPS id 196si246468pgb.49.2017.06.28.01.23.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Jun 2017 01:23:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=FRZrWesS; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 08D8321A00AD1; Wed, 28 Jun 2017 01:22:02 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x22a.google.com (mail-wm0-x22a.google.com [IPv6:2a00:1450:400c:c09::22a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7D30321A00AD1 for ; Wed, 28 Jun 2017 01:22:00 -0700 (PDT) Received: by mail-wm0-x22a.google.com with SMTP id z75so10580271wmc.0 for ; Wed, 28 Jun 2017 01:23:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=D0WQ7NAYA0aQQh+okzaJ18lU9JVGkoPhWgOfg8Ws97o=; b=FRZrWesS3ecr4aBBf3yqoEgEvH0yWGWGmhtW3wZzz/SEqwNsXU3RpiZ4Q2R8+TxLbh Wu/P7XjQ6X+3bw7yALzvEpBqCA8xnvq1fNS6bqg85miP8ZVINYTnbPyPnC266Rc5D+gT pMr4K78DSBZ8e+PVdpQXNyq0EYgSuIYL9qWe8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=D0WQ7NAYA0aQQh+okzaJ18lU9JVGkoPhWgOfg8Ws97o=; b=ofA0zoQvml/siObSS1oKe4QBvsoCjSRJ0GARsfOCHmj+twYh2E0CzbXnl1IFIQlD2V yhbuL+VY/tGPdOaZUOQoJzlas1fRUCWCHoVFGPf4jmSgkSRLg++iw33Bkxmfx5IbKtTI wvaGNC4xSiA8y0nP3vyQwxNrNwvDTp7FoA6e74wQfDQihL6NjGNaEywf4n944vhDkeao PsRuaO/k+L3PW6f7NNahMVc9kGC2l8mMNojkXFdFLeA3j+ZeX65qBROfnK5Srp2K8gI0 XV7ewVT7EGwi9qMJUD95bF8OWVg1aOtWz1XywaiqkLe07k32AKaPiV4/c2BkM9r5dbL4 sHww== X-Gm-Message-State: AKS2vOyePAQWq5fL8Muq3zK6rcirNu+3Eidx6VWgpNoV+YTqWt9A9UD0 UKS/1lEVTme5cH1S9OIwyQ== X-Received: by 10.28.145.12 with SMTP id t12mr5863285wmd.7.1498638210219; Wed, 28 Jun 2017 01:23:30 -0700 (PDT) Received: from localhost.localdomain ([105.133.250.69]) by smtp.gmail.com with ESMTPSA id m188sm5676083wmg.34.2017.06.28.01.23.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Jun 2017 01:23:29 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, star.zeng@intel.com Date: Wed, 28 Jun 2017 08:23:23 +0000 Message-Id: <20170628082323.30270-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 Subject: [edk2] [PATCH v2] MdeModulePkg/AtaAtapiPassThru: relax PHY detect timeout X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: feng.tian@intel.com, eric.dong@intel.com, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The SATA spec mandates that link detection by the PHY completes within 10 ms after receiving a reset signal. However, there is no obligation to uphold this requirement at the driver end as strictly as we do, and as it turns out, some combinations of host and device (e.g., Samsung 850 EVO connected to a LeMaker Cello) are only borderline compliant, which means the device is not detected reliably. So let's allow for a bit of margin, and increase the PHY detect timeout value to 15 ms. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- v2: update comment in AhciModeInitialization() as well MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 5 +++-- MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) -- 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Signed-off-by: Ard Biesheuvel diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c index 4d01c1dd7fca..4418e5c3763e 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c @@ -2376,8 +2376,9 @@ AhciModeInitialization ( AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE); // - // Wait no longer than 10 ms to wait the Phy to detect the presence of a device. - // It's the requirment from SATA1.0a spec section 5.2. + // Wait at least 10 ms for the Phy to detect the presence of a device. + // It's the requirement from SATA1.0a spec section 5.2. + // Add a bit of margin for robustness. // PhyDetectDelay = EFI_AHCI_BUS_PHY_DETECT_TIMEOUT; Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS; diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h index 6401fb2e9fcd..809bcc307fc4 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h @@ -41,8 +41,9 @@ typedef union { // // Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms. +// Add a bit of margin for robustness. // -#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 10 +#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15 // // Refer SATA1.0a spec, the FIS enable time should be less than 500ms. //