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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id 64-v6si4705899plk.152.2018.02.20.09.50.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Feb 2018 09:50:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=a60cpkRX; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 5786F220F33DA; Tue, 20 Feb 2018 09:44:10 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::241; helo=mail-wr0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x241.google.com (mail-wr0-x241.google.com [IPv6:2a00:1450:400c:c0c::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DA45821CF1CF3 for ; Tue, 20 Feb 2018 09:44:07 -0800 (PST) Received: by mail-wr0-x241.google.com with SMTP id p104so15482035wrc.12 for ; Tue, 20 Feb 2018 09:50:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mugOs5n6PaJbGQvxVaCLOln8APdd3/1MEwgcUf/WoiE=; b=a60cpkRXeAvZhUGhbHUZppVBJWkKgXYJsreuA2gFVOJQF7KyZ04mYjkoW/BFSqn2Zv FSbQbFhhbV+rhY4fKo8q0i+jGWAA+yUKRAYFTsPv11HiFqzmzVBUHq4TtFBOURVGu9wP BaSSGTbs43fSnoErC/6wgqCaakxiMJdJcmy7w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mugOs5n6PaJbGQvxVaCLOln8APdd3/1MEwgcUf/WoiE=; b=XAYNet9bQychXG9MMM2reTFfcShoz7BSVxB/GQkAcRTtV/EVpJvsdtkLn8jPUlspir EaanrKeubUHiM0hEd4faig/9LTbVeSTQVSx5YZzVECtG8pvxmWSJjlBDV1ErggHaPPKk MqpKeZaTh1qqqbLbXo5rRYa569G8ukNwU7WdPd4SsRqmIfHt/Ei/hTJHowCp0K+3/Xqp ZmEBrqoR96zh9B7waAiUrC4lBb1KcKGG8k8f+sutzA3mxNTcu1i4RpwHAr1HcfJoGoDf GV9LwJyOF6JwIvRHbKZRU4+9NB8J4J4JkJdVjtH8/0w2/6mC9YHS79Jv7O9fVFcE2EcB MEUQ== X-Gm-Message-State: APf1xPDaEgVep4jTIgO+hj7TjEvBs1vC/XeZFt2ZgCtbpgQxTLtVoGZw pAICUlwEPCBY047TZcfA4IEkzvCxh9E= X-Received: by 10.223.197.197 with SMTP id v5mr407728wrg.161.1519149004819; Tue, 20 Feb 2018 09:50:04 -0800 (PST) Received: from localhost.localdomain ([105.149.187.179]) by smtp.gmail.com with ESMTPSA id u63sm18282208wrc.26.2018.02.20.09.50.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Feb 2018 09:50:03 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Tue, 20 Feb 2018 17:49:42 +0000 Message-Id: <20180220174944.525-6-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180220174944.525-1-ard.biesheuvel@linaro.org> References: <20180220174944.525-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms v2 5/7] Platform/NinetySixBoards: add a driver for the Secure96 mezzanine board X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add a driver that describes the Secure96 mezzanine board, and exposes both the information required to describe it to the OS using a DT overlay, and to describe it to UEFI itself. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/NinetySixBoards/Secure96Dxe/Secure96.dts | 76 +++++++ Platform/NinetySixBoards/Secure96Dxe/Secure96.h | 26 +++ Platform/NinetySixBoards/Secure96Dxe/Secure96Dxe.c | 211 ++++++++++++++++++++ Platform/NinetySixBoards/Secure96Dxe/Secure96Dxe.inf | 67 +++++++ 4 files changed, 380 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/NinetySixBoards/Secure96Dxe/Secure96.dts b/Platform/NinetySixBoards/Secure96Dxe/Secure96.dts new file mode 100644 index 000000000000..08f59978c06f --- /dev/null +++ b/Platform/NinetySixBoards/Secure96Dxe/Secure96.dts @@ -0,0 +1,76 @@ +/** @file + * Copyright (c) 2018, Linaro Limited. All rights reserved. + * + * This program and the accompanying materials are licensed and made + * available under the terms and conditions of the BSD License which + * accompanies this distribution. The full text of the license may be + * found at http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR + * IMPLIED. + */ + +#include "Secure96.h" + +#define GPIO_PARENT_PLACEHOLDER_PHANDLE 0x0 + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target-path = "I2C_PARENT_PLACEHOLDER_STRING"; + __overlay__ { + ATSHA204A_DT_NODENAME { + compatible = "atmel,atsha204a"; + reg = ; + }; + ATECC508A_DT_NODENAME { + compatible = "atmel,atecc508a"; + reg = ; + }; + }; + }; + + fragment@1 { + target-path = "SPI_PARENT_PLACEHOLDER_STRING"; + __overlay__ { + INFINEON_SLB9670_DT_NODENAME { + compatible = "infineon,slb9670"; + reg = ; + spi-max-frequency = <22500000>; + }; + }; + }; + + fragment@2 { + target-path = "/"; + __overlay__ { + gpio-leds { + compatible = "gpio-leds"; + + secure96-u1 { + gpios = ; + }; + secure96-u2 { + gpios = ; + }; + secure96-u3 { + gpios = ; + }; + secure96-u4 { + gpios = ; + }; + }; + }; + }; +}; diff --git a/Platform/NinetySixBoards/Secure96Dxe/Secure96.h b/Platform/NinetySixBoards/Secure96Dxe/Secure96.h new file mode 100644 index 000000000000..84b8aed13d1e --- /dev/null +++ b/Platform/NinetySixBoards/Secure96Dxe/Secure96.h @@ -0,0 +1,26 @@ +/** @file + + Copyright (c) 2018, Linaro, Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made available + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ + +#ifndef _SECURE96_H_ +#define _SECURE96_H_ + +#define ATSHA204A_SLAVE_ADDRESS 0x60 +#define ATSHA204A_DT_NODENAME atsha204a@60 + +#define ATECC508A_SLAVE_ADDRESS 0x51 +#define ATECC508A_DT_NODENAME atecc508a@51 + +#define INFINEON_SLB9670_SPI_CS 0x0 +#define INFINEON_SLB9670_DT_NODENAME tpm@0 + +#endif // _SECURE96_H_ diff --git a/Platform/NinetySixBoards/Secure96Dxe/Secure96Dxe.c b/Platform/NinetySixBoards/Secure96Dxe/Secure96Dxe.c new file mode 100644 index 000000000000..000f4b4abba4 --- /dev/null +++ b/Platform/NinetySixBoards/Secure96Dxe/Secure96Dxe.c @@ -0,0 +1,211 @@ +/** @file + 96boards Secure96 mezzanine board DXE driver. + + Copyright (c) 2018, Linaro, Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made available + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "Secure96.h" + +STATIC CONST UINT32 mI2cAtmelSha204aSlaveAddress[] = { + ATSHA204A_SLAVE_ADDRESS, + + // + // The Atmel AtSha204a has an annoying 'wake' mode where it will only wake + // up if SDA is held low for a certain amount of time. Attempting to access + // a device at address 0x0 at 100 kHz should be sufficient to create this + // wake condition, so add address 0x0 to the slave addresses. + // + 0 +}; + +STATIC CONST EFI_I2C_DEVICE mI2c0Devices[] = { + { + &gAtSha204aI2cDeviceGuid, // DeviceGuid + 0, // DeviceIndex + 0, // HardwareRevision + 0, // I2C bus configuration + ARRAY_SIZE (mI2cAtmelSha204aSlaveAddress), // SlaveAddressCount + mI2cAtmelSha204aSlaveAddress // SlaveAddressArray + } +}; + +STATIC CONST CHAR8 mLedNodes[][46] = { + "/fragment@2/__overlay__/gpio-leds/secure96-u1", + "/fragment@2/__overlay__/gpio-leds/secure96-u2", + "/fragment@2/__overlay__/gpio-leds/secure96-u3", + "/fragment@2/__overlay__/gpio-leds/secure96-u4", +}; + +STATIC +VOID +SetOverlayFragmentTarget ( + VOID *Overlay, + CONST CHAR8 *NodeName, + CONST CHAR8 *Target + ) +{ + INT32 Node; + INT32 Err; + + Node = fdt_path_offset (Overlay, NodeName); + ASSERT (Node > 0); + + Err = fdt_setprop (Overlay, Node, "target-path", Target, + AsciiStrLen (Target) + 1); + if (Err) { + DEBUG ((DEBUG_ERROR, "%a: fdt_setprop() failed - %a\n", + __FUNCTION__, fdt_strerror (Err))); + } +} + +STATIC +VOID +FixupOverlay ( + VOID *Dtb, + VOID *Overlay + ) +{ + INT32 Node; + UINT32 GpioPhandle; + UINTN Idx; + UINT32 *GpioProp; + INT32 Err; + + // + // Set the correct GPIO phandle in the LED nodes + // + Node = fdt_path_offset (Dtb, FixedPcdGetPtr (PcdGpioParent)); + ASSERT (Node > 0); + + GpioPhandle = fdt_get_phandle (Dtb, Node); + if (!GpioPhandle) { + // + // Node has no phandle yet -> create one + // + GpioPhandle = 1 + fdt_get_max_phandle (Dtb); + ASSERT (GpioPhandle >= 1); + + Err = fdt_setprop_u32 (Dtb, Node, "phandle", GpioPhandle); + if (Err) { + DEBUG ((DEBUG_ERROR, + "%a: fdt_setprop_u32(.., .., \"phandle\", 0x%x) failed - %a\n", + __FUNCTION__, GpioPhandle, fdt_strerror (Err))); + } + } + + for (Idx = 0; Idx < ARRAY_SIZE (mLedNodes); Idx++) { + Node = fdt_path_offset (Overlay, mLedNodes[Idx]); + ASSERT (Node > 0); + + GpioProp = fdt_getprop_w (Overlay, Node, "gpios", NULL); + ASSERT (GpioProp != NULL); + + *GpioProp = cpu_to_fdt32 (GpioPhandle); + } + + SetOverlayFragmentTarget (Overlay, "/fragment@0", + FixedPcdGetPtr (PcdI2c0Parent)); + + SetOverlayFragmentTarget (Overlay, "/fragment@1", + FixedPcdGetPtr (PcdSpiParent)); +} + +/** + Apply the mezzanine's DT overlay + + @param[in] This Pointer to the MEZZANINE_PROTOCOL instance. + @param[in,out] Dtb Pointer to the device tree blob + + @return EFI_SUCCESS Operation succeeded. + @return other An error has occurred. +**/ +STATIC +EFI_STATUS +ApplyDeviceTreeOverlay ( + IN MEZZANINE_PROTOCOL *This, + IN OUT VOID *Dtb + ) +{ + VOID *Overlay; + UINTN OverlaySize; + EFI_STATUS Status; + INT32 Err; + + // + // Load the raw overlay DTB image from the raw section of this FFS file. + // + Status = GetSectionFromFv (&gEfiCallerIdGuid, + EFI_SECTION_RAW, 0, &Overlay, &OverlaySize); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + return EFI_NOT_FOUND; + } + + // + // Fix up unresolved references in the overlay. + // + FixupOverlay (Dtb, Overlay); + + // + // Merge the overlay with the DTB + // + Err = fdt_overlay_apply (Dtb, Overlay); + if (Err) { + DEBUG ((DEBUG_ERROR, "%a: fdt_overlay_apply() failed - %a\n", + __FUNCTION__, fdt_strerror (Err))); + return EFI_NOT_FOUND; + } + + return EFI_SUCCESS; +} + +STATIC MEZZANINE_PROTOCOL mMezzanine = { + ApplyDeviceTreeOverlay, + ARRAY_SIZE (mI2c0Devices), + 0, + mI2c0Devices, + NULL, + NULL, +}; + +EFI_STATUS +EFIAPI +Secure96DxeEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + LS_CONNECTOR_PROTOCOL *LsConnector; + + Status = gBS->LocateProtocol (&gNinetySixBoardsLsConnectorProtocolGuid, NULL, + (VOID **)&LsConnector); + ASSERT_EFI_ERROR (Status); + + if (LsConnector->MezzanineType != MezzanineSecure96) { + return EFI_NOT_FOUND; + } + + return gBS->InstallProtocolInterface (&ImageHandle, + &gNinetySixBoardsMezzanineProtocolGuid, + EFI_NATIVE_INTERFACE, + &mMezzanine); +} diff --git a/Platform/NinetySixBoards/Secure96Dxe/Secure96Dxe.inf b/Platform/NinetySixBoards/Secure96Dxe/Secure96Dxe.inf new file mode 100644 index 000000000000..e5686b9f5382 --- /dev/null +++ b/Platform/NinetySixBoards/Secure96Dxe/Secure96Dxe.inf @@ -0,0 +1,67 @@ +## @file +# +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = Secure96Dxe + FILE_GUID = 31519ec4-65f1-4790-b223-aa9330dd75fd + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = Secure96DxeEntryPoint + +[Sources] + Secure96.dts + Secure96.h + Secure96Dxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Platform/NinetySixBoards/NinetySixBoards.dec + Silicon/Atmel/AtSha204a/AtSha204a.dec + +[LibraryClasses] + BaseLib + DebugLib + DxeServicesLib + FdtLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + +[Protocols] + gNinetySixBoardsLsConnectorProtocolGuid ## CONSUMES + gNinetySixBoardsMezzanineProtocolGuid ## PRODUCES + +[Guids] + gAtSha204aI2cDeviceGuid + gFdtTableGuid + +[FixedPcd] + gNinetySixBoardsTokenSpaceGuid.PcdGpioParent + gNinetySixBoardsTokenSpaceGuid.PcdGpioPinF + gNinetySixBoardsTokenSpaceGuid.PcdGpioPinG + gNinetySixBoardsTokenSpaceGuid.PcdGpioPinH + gNinetySixBoardsTokenSpaceGuid.PcdGpioPinI + gNinetySixBoardsTokenSpaceGuid.PcdGpioPolarity + gNinetySixBoardsTokenSpaceGuid.PcdI2c0Parent + gNinetySixBoardsTokenSpaceGuid.PcdSpiParent + +[Depex] + gNinetySixBoardsLsConnectorProtocolGuid + +[BuildOptions] + # dtc emits lots of spurious warnings for overlays + *_*_*_DTC_FLAGS = -q