From patchwork Sun Feb 7 06:17:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tian Tao X-Patchwork-Id: 378649 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18DE2C433DB for ; Sun, 7 Feb 2021 06:19:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D3FAB64E92 for ; Sun, 7 Feb 2021 06:19:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229506AbhBGGSr (ORCPT ); Sun, 7 Feb 2021 01:18:47 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]:12863 "EHLO szxga07-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229445AbhBGGSq (ORCPT ); Sun, 7 Feb 2021 01:18:46 -0500 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4DYJnz5Yl8z7hJh; Sun, 7 Feb 2021 14:16:39 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.498.0; Sun, 7 Feb 2021 14:17:57 +0800 From: Tian Tao To: , , , CC: , Subject: [PATCH] drm/msm/dsi: replace spin_lock_irqsave by spin_lock in hard IRQ Date: Sun, 7 Feb 2021 14:17:25 +0800 Message-ID: <1612678645-60774-1-git-send-email-tiantao6@hisilicon.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The code has been in a irq-disabled context since it is hard IRQ. There is no necessity to do it again. Signed-off-by: Tian Tao --- drivers/gpu/drm/msm/dsi/dsi_host.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index ab281cb..8ba204d 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1555,15 +1555,14 @@ static irqreturn_t dsi_host_irq(int irq, void *ptr) { struct msm_dsi_host *msm_host = ptr; u32 isr; - unsigned long flags; if (!msm_host->ctrl_base) return IRQ_HANDLED; - spin_lock_irqsave(&msm_host->intr_lock, flags); + spin_lock(&msm_host->intr_lock); isr = dsi_read(msm_host, REG_DSI_INTR_CTRL); dsi_write(msm_host, REG_DSI_INTR_CTRL, isr); - spin_unlock_irqrestore(&msm_host->intr_lock, flags); + spin_unlock(&msm_host->intr_lock); DBG("isr=0x%x, id=%d", isr, msm_host->id);